diff mbox

[1/4] hw/ppc/spapr: Add h_set_sprg0 hypercall

Message ID 1455127752-17293-2-git-send-email-thuth@redhat.com
State New
Headers show

Commit Message

Thomas Huth Feb. 10, 2016, 6:09 p.m. UTC
This is a very simple hypercall that only sets up the SPRG0
register for the guest (since writing to SPRG0 was only permitted
to the hypervisor in older versions of the PowerISA).

Signed-off-by: Thomas Huth <thuth@redhat.com>
---
 hw/ppc/spapr_hcall.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

Comments

David Gibson Feb. 10, 2016, 11:30 p.m. UTC | #1
On Wed, Feb 10, 2016 at 07:09:09PM +0100, Thomas Huth wrote:
> This is a very simple hypercall that only sets up the SPRG0
> register for the guest (since writing to SPRG0 was only permitted
> to the hypervisor in older versions of the PowerISA).
> 
> Signed-off-by: Thomas Huth <thuth@redhat.com>
> ---
>  hw/ppc/spapr_hcall.c | 15 +++++++++++++--
>  1 file changed, 13 insertions(+), 2 deletions(-)
> 
> diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
> index 12f8c33..58103ef 100644
> --- a/hw/ppc/spapr_hcall.c
> +++ b/hw/ppc/spapr_hcall.c
> @@ -332,6 +332,15 @@ static target_ulong h_read(PowerPCCPU *cpu, sPAPRMachineState *spapr,
>      return H_SUCCESS;
>  }
>  
> +static target_ulong h_set_sprg0(PowerPCCPU *cpu, sPAPRMachineState *spapr,
> +                                target_ulong opcode, target_ulong *args)
> +{
> +    CPUState *cs = CPU(cpu);
> +
> +    set_spr(cs, SPR_SPRG0, args[0], -1L);

This looks correct, but I think set_spr() is serious overkill here.
It does some fancy synchronization designed for setting one cpu's SPR
from an hcall executed on a different CPU.  In this case the calling
CPU is just setting its own SPRG0, so just
	cpu_synchronize_state()
	env->spr[SPR_SPRG0] = XXX

Should be sufficient.

> +    return H_SUCCESS;
> +}
> +
>  static target_ulong h_set_dabr(PowerPCCPU *cpu, sPAPRMachineState *spapr,
>                                 target_ulong opcode, target_ulong *args)
>  {
> @@ -997,6 +1006,10 @@ static void hypercall_register_types(void)
>      spapr_register_hypercall(H_REGISTER_VPA, h_register_vpa);
>      spapr_register_hypercall(H_CEDE, h_cede);
>  
> +    /* processor register resource access h-calls */
> +    spapr_register_hypercall(H_SET_SPRG0, h_set_sprg0);
> +    spapr_register_hypercall(H_SET_MODE, h_set_mode);
> +
>      /* "debugger" hcalls (also used by SLOF). Note: We do -not- differenciate
>       * here between the "CI" and the "CACHE" variants, they will use whatever
>       * mapping attributes qemu is using. When using KVM, the kernel will
> @@ -1013,8 +1026,6 @@ static void hypercall_register_types(void)
>      /* qemu/KVM-PPC specific hcalls */
>      spapr_register_hypercall(KVMPPC_H_RTAS, h_rtas);
>  
> -    spapr_register_hypercall(H_SET_MODE, h_set_mode);
> -
>      /* ibm,client-architecture-support support */
>      spapr_register_hypercall(KVMPPC_H_CAS, h_client_architecture_support);
>  }
Thomas Huth Feb. 11, 2016, 7:12 a.m. UTC | #2
On 11.02.2016 00:30, David Gibson wrote:
> On Wed, Feb 10, 2016 at 07:09:09PM +0100, Thomas Huth wrote:
>> This is a very simple hypercall that only sets up the SPRG0
>> register for the guest (since writing to SPRG0 was only permitted
>> to the hypervisor in older versions of the PowerISA).
>>
>> Signed-off-by: Thomas Huth <thuth@redhat.com>
>> ---
>>  hw/ppc/spapr_hcall.c | 15 +++++++++++++--
>>  1 file changed, 13 insertions(+), 2 deletions(-)
>>
>> diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
>> index 12f8c33..58103ef 100644
>> --- a/hw/ppc/spapr_hcall.c
>> +++ b/hw/ppc/spapr_hcall.c
>> @@ -332,6 +332,15 @@ static target_ulong h_read(PowerPCCPU *cpu, sPAPRMachineState *spapr,
>>      return H_SUCCESS;
>>  }
>>  
>> +static target_ulong h_set_sprg0(PowerPCCPU *cpu, sPAPRMachineState *spapr,
>> +                                target_ulong opcode, target_ulong *args)
>> +{
>> +    CPUState *cs = CPU(cpu);
>> +
>> +    set_spr(cs, SPR_SPRG0, args[0], -1L);
> 
> This looks correct, but I think set_spr() is serious overkill here.
> It does some fancy synchronization designed for setting one cpu's SPR
> from an hcall executed on a different CPU.  In this case the calling
> CPU is just setting its own SPRG0, so just
> 	cpu_synchronize_state()
> 	env->spr[SPR_SPRG0] = XXX
> 
> Should be sufficient.

AFAIK the synchronization stuff is skipped when set_spr() runs already
on the destination CPU, but ok, since h-calls should be fast, I can
change this anyway to save some precious cycles.

 Thomas
diff mbox

Patch

diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index 12f8c33..58103ef 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -332,6 +332,15 @@  static target_ulong h_read(PowerPCCPU *cpu, sPAPRMachineState *spapr,
     return H_SUCCESS;
 }
 
+static target_ulong h_set_sprg0(PowerPCCPU *cpu, sPAPRMachineState *spapr,
+                                target_ulong opcode, target_ulong *args)
+{
+    CPUState *cs = CPU(cpu);
+
+    set_spr(cs, SPR_SPRG0, args[0], -1L);
+    return H_SUCCESS;
+}
+
 static target_ulong h_set_dabr(PowerPCCPU *cpu, sPAPRMachineState *spapr,
                                target_ulong opcode, target_ulong *args)
 {
@@ -997,6 +1006,10 @@  static void hypercall_register_types(void)
     spapr_register_hypercall(H_REGISTER_VPA, h_register_vpa);
     spapr_register_hypercall(H_CEDE, h_cede);
 
+    /* processor register resource access h-calls */
+    spapr_register_hypercall(H_SET_SPRG0, h_set_sprg0);
+    spapr_register_hypercall(H_SET_MODE, h_set_mode);
+
     /* "debugger" hcalls (also used by SLOF). Note: We do -not- differenciate
      * here between the "CI" and the "CACHE" variants, they will use whatever
      * mapping attributes qemu is using. When using KVM, the kernel will
@@ -1013,8 +1026,6 @@  static void hypercall_register_types(void)
     /* qemu/KVM-PPC specific hcalls */
     spapr_register_hypercall(KVMPPC_H_RTAS, h_rtas);
 
-    spapr_register_hypercall(H_SET_MODE, h_set_mode);
-
     /* ibm,client-architecture-support support */
     spapr_register_hypercall(KVMPPC_H_CAS, h_client_architecture_support);
 }