From patchwork Mon Aug 24 12:03:26 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 510141 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id AECDD1401C7 for ; Tue, 25 Aug 2015 02:01:24 +1000 (AEST) Received: from localhost ([::1]:54277 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZTuBV-0002ji-4Q for incoming@patchwork.ozlabs.org; Mon, 24 Aug 2015 12:01:21 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:32916) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZTqUQ-0008Gz-QN for qemu-devel@nongnu.org; Mon, 24 Aug 2015 08:04:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZTqUL-0004Be-QL for qemu-devel@nongnu.org; Mon, 24 Aug 2015 08:04:38 -0400 Received: from e28smtp02.in.ibm.com ([122.248.162.2]:56070) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZTqUL-0004Aj-5w for qemu-devel@nongnu.org; Mon, 24 Aug 2015 08:04:33 -0400 Received: from /spool/local by e28smtp02.in.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Mon, 24 Aug 2015 17:34:27 +0530 X-Helo: d28dlp02.in.ibm.com X-MailFrom: gwshan@linux.vnet.ibm.com X-RcptTo: qemu-ppc@nongnu.org Received: from d28relay02.in.ibm.com (d28relay02.in.ibm.com [9.184.220.59]) by d28dlp02.in.ibm.com (Postfix) with ESMTP id 94090394004E; Mon, 24 Aug 2015 17:34:27 +0530 (IST) Received: from d28av04.in.ibm.com (d28av04.in.ibm.com [9.184.220.66]) by d28relay02.in.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id t7OC4E8j9044002; Mon, 24 Aug 2015 17:34:15 +0530 Received: from d28av04.in.ibm.com (localhost [127.0.0.1]) by d28av04.in.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id t7OC4DG0005408; Mon, 24 Aug 2015 17:34:14 +0530 Received: from gwshan ([9.192.174.23]) by d28av04.in.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with SMTP id t7OC47dg004950; Mon, 24 Aug 2015 17:34:11 +0530 Received: by gwshan (Postfix, from userid 1000) id 204629424CB; Mon, 24 Aug 2015 22:03:54 +1000 (AEST) From: Gavin Shan To: qemu-devel@nongnu.org Date: Mon, 24 Aug 2015 22:03:26 +1000 Message-Id: <1440417809-21069-6-git-send-email-gwshan@linux.vnet.ibm.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1440417809-21069-1-git-send-email-gwshan@linux.vnet.ibm.com> References: <1440417809-21069-1-git-send-email-gwshan@linux.vnet.ibm.com> X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 15082412-0005-0000-0000-00000723128A X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 122.248.162.2 Cc: peter.maydell@linaro.org, thuth@redhat.com, aik@ozlabs.ru, Gavin Shan , qemu-ppc@nongnu.org, david@gibson.dropbear.id.au Subject: [Qemu-devel] [PATCH v6 5/8] Obsolete PCI_MSIX_FLAGS_BIRMASK X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This replaces PCI_MSIX_FLAGS_BIRMASK with PCI_MSIX_TABLE_BIR. Also, 3 more macros regarding MSIx table offset, MSIx PBA BAR index and MSIx PBA offset and this uses them. Besides, PCI_ERR_UNC_TRAIN is replaced with PCI_ERR_UNC_UND. The changes were introduced by below Linux upstream commits: commit 24bc69da ("PCI: Clean up MSI/MSI-X capability #defines") commit 846fc709 ("PCI/AER: Rename PCI_ERR_UNC_TRAIN to PCI_ERR_UNC_UND") Signed-off-by: Gavin Shan --- hw/i386/kvm/pci-assign.c | 4 ++-- hw/pci/msix.c | 2 +- hw/pci/pcie_aer.c | 2 +- hw/s390x/s390-pci-bus.c | 8 ++++---- hw/vfio/pci.c | 8 ++++---- hw/xen/xen_pt_msi.c | 4 ++-- tests/libqos/pci.c | 8 ++++---- 7 files changed, 18 insertions(+), 18 deletions(-) diff --git a/hw/i386/kvm/pci-assign.c b/hw/i386/kvm/pci-assign.c index 74d22f4..74154b1 100644 --- a/hw/i386/kvm/pci-assign.c +++ b/hw/i386/kvm/pci-assign.c @@ -1320,8 +1320,8 @@ static int assigned_device_pci_cap_init(PCIDevice *pci_dev, Error **errp) PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL); msix_table_entry = pci_get_long(pci_dev->config + pos + PCI_MSIX_TABLE); - bar_nr = msix_table_entry & PCI_MSIX_FLAGS_BIRMASK; - msix_table_entry &= ~PCI_MSIX_FLAGS_BIRMASK; + bar_nr = msix_table_entry & PCI_MSIX_TABLE_BIR; + msix_table_entry &= PCI_MSIX_TABLE_OFFSET; dev->msix_table_addr = pci_region[bar_nr].base_addr + msix_table_entry; dev->msix_max = msix_max; } diff --git a/hw/pci/msix.c b/hw/pci/msix.c index 7716bf3..2788be2 100644 --- a/hw/pci/msix.c +++ b/hw/pci/msix.c @@ -250,7 +250,7 @@ int msix_init(struct PCIDevice *dev, unsigned short nentries, ranges_overlap(table_offset, table_size, pba_offset, pba_size)) || table_offset + table_size > memory_region_size(table_bar) || pba_offset + pba_size > memory_region_size(pba_bar) || - (table_offset | pba_offset) & PCI_MSIX_FLAGS_BIRMASK) { + (table_offset | pba_offset) & PCI_MSIX_TABLE_BIR) { return -EINVAL; } diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c index f1847ac..1def4a4 100644 --- a/hw/pci/pcie_aer.c +++ b/hw/pci/pcie_aer.c @@ -828,7 +828,7 @@ typedef struct PCIEAERErrorName { static const struct PCIEAERErrorName pcie_aer_error_list[] = { { .name = "TRAIN", - .val = PCI_ERR_UNC_TRAIN, + .val = PCI_ERR_UNC_UND, .correctable = false, }, { .name = "DLP", diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c index 560b66a..7dac2c0 100644 --- a/hw/s390x/s390-pci-bus.c +++ b/hw/s390x/s390-pci-bus.c @@ -507,10 +507,10 @@ static int s390_pcihost_setup_msix(S390PCIBusDevice *pbdev) pba = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_PBA, pci_config_size(pbdev->pdev), sizeof(pba)); - pbdev->msix.table_bar = table & PCI_MSIX_FLAGS_BIRMASK; - pbdev->msix.table_offset = table & ~PCI_MSIX_FLAGS_BIRMASK; - pbdev->msix.pba_bar = pba & PCI_MSIX_FLAGS_BIRMASK; - pbdev->msix.pba_offset = pba & ~PCI_MSIX_FLAGS_BIRMASK; + pbdev->msix.table_bar = table & PCI_MSIX_TABLE_BIR; + pbdev->msix.table_offset = table & PCI_MSIX_TABLE_OFFSET; + pbdev->msix.pba_bar = pba & PCI_MSIX_PBA_BIR; + pbdev->msix.pba_offset = pba & PCI_MSIX_PBA_OFFSET; pbdev->msix.entries = (ctrl & PCI_MSIX_FLAGS_QSIZE) + 1; pbdev->msix.available = true; return 0; diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c index 4023d8e..0481d05 100644 --- a/hw/vfio/pci.c +++ b/hw/vfio/pci.c @@ -2244,10 +2244,10 @@ static int vfio_early_setup_msix(VFIOPCIDevice *vdev) pba = le32_to_cpu(pba); vdev->msix = g_malloc0(sizeof(*(vdev->msix))); - vdev->msix->table_bar = table & PCI_MSIX_FLAGS_BIRMASK; - vdev->msix->table_offset = table & ~PCI_MSIX_FLAGS_BIRMASK; - vdev->msix->pba_bar = pba & PCI_MSIX_FLAGS_BIRMASK; - vdev->msix->pba_offset = pba & ~PCI_MSIX_FLAGS_BIRMASK; + vdev->msix->table_bar = table & PCI_MSIX_TABLE_BIR; + vdev->msix->table_offset = table & PCI_MSIX_TABLE_OFFSET; + vdev->msix->pba_bar = pba & PCI_MSIX_PBA_BIR; + vdev->msix->pba_offset = pba & PCI_MSIX_PBA_OFFSET; vdev->msix->entries = (ctrl & PCI_MSIX_FLAGS_QSIZE) + 1; /* diff --git a/hw/xen/xen_pt_msi.c b/hw/xen/xen_pt_msi.c index 263e051..ff84dbe 100644 --- a/hw/xen/xen_pt_msi.c +++ b/hw/xen/xen_pt_msi.c @@ -555,8 +555,8 @@ int xen_pt_msix_init(XenPCIPassthroughState *s, uint32_t base) & XC_PAGE_MASK); xen_host_pci_get_long(hd, base + PCI_MSIX_TABLE, &table_off); - bar_index = msix->bar_index = table_off & PCI_MSIX_FLAGS_BIRMASK; - table_off = table_off & ~PCI_MSIX_FLAGS_BIRMASK; + bar_index = msix->bar_index = table_off & PCI_MSIX_TABLE_BIR; + table_off = table_off & PCI_MSIX_TABLE_OFFSET; msix->table_base = s->real_device.io_regions[bar_index].base_addr; XEN_PT_LOG(d, "get MSI-X table BAR base 0x%"PRIx64"\n", msix->table_base); diff --git a/tests/libqos/pci.c b/tests/libqos/pci.c index 4e630c2..55fe5bf 100644 --- a/tests/libqos/pci.c +++ b/tests/libqos/pci.c @@ -110,16 +110,16 @@ void qpci_msix_enable(QPCIDevice *dev) qpci_config_writew(dev, addr + PCI_MSIX_FLAGS, val | PCI_MSIX_FLAGS_ENABLE); table = qpci_config_readl(dev, addr + PCI_MSIX_TABLE); - bir_table = table & PCI_MSIX_FLAGS_BIRMASK; + bir_table = table & PCI_MSIX_TABLE_BIR; offset = qpci_iomap(dev, bir_table, NULL); - dev->msix_table = offset + (table & ~PCI_MSIX_FLAGS_BIRMASK); + dev->msix_table = offset + (table & PCI_MSIX_TABLE_OFFSET); table = qpci_config_readl(dev, addr + PCI_MSIX_PBA); - bir_pba = table & PCI_MSIX_FLAGS_BIRMASK; + bir_pba = table & PCI_MSIX_PBA_BIR; if (bir_pba != bir_table) { offset = qpci_iomap(dev, bir_pba, NULL); } - dev->msix_pba = offset + (table & ~PCI_MSIX_FLAGS_BIRMASK); + dev->msix_pba = offset + (table & PCI_MSIX_PBA_OFFSET); g_assert(dev->msix_table != NULL); g_assert(dev->msix_pba != NULL);