From patchwork Mon Aug 17 19:38:32 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 508154 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id BB2461402A0 for ; Tue, 18 Aug 2015 12:29:34 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=w0plPgfW; dkim-atps=neutral Received: from localhost ([::1]:49785 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZRWea-00040z-B6 for incoming@patchwork.ozlabs.org; Mon, 17 Aug 2015 22:29:32 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57468) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZRQG0-00066J-7n for qemu-devel@nongnu.org; Mon, 17 Aug 2015 15:39:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZRQFv-0008Jw-BL for qemu-devel@nongnu.org; Mon, 17 Aug 2015 15:39:44 -0400 Received: from mail-qg0-x22e.google.com ([2607:f8b0:400d:c04::22e]:36597) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZRQFv-0008Jq-8H for qemu-devel@nongnu.org; Mon, 17 Aug 2015 15:39:39 -0400 Received: by qgdd90 with SMTP id d90so101564647qgd.3 for ; Mon, 17 Aug 2015 12:39:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=ZlnRMC209yXf6gyHAQIcKVcp+odoZ0SKtQ+qreo85JY=; b=w0plPgfWZHHhbSEo5MwcKlx7cDR5yO3Zjn2V4PRfR8EuMridU6VfqN2p0l0OzdXpP2 In52ZE3ZR2oALS4zhP7vAXUZy1TRxwxTUxZT9RuSTH4NXmzAiwMdqqs7YMy/cme9DisI VdUBEihxPzT37gj34UZ6J1O6aOvZ0lGfwS7pU0BOCdDf+URehAXvp+eIEU4AcOkOMFGE 1+d0gbBm9IoCNmbJnhkUTIQwLgzure4EVk7oPnRH90QEzrEW62EJM7Fj2bgf6u9HEsvg b8oYfiuLCPkhyQE66pBB+rv+nBc3ed3BrQqN0OAJSGf6vEF54BjAjJZ9oeFSd2V0ncCo MjtA== X-Received: by 10.140.16.43 with SMTP id 40mr5582253qga.64.1439840378883; Mon, 17 Aug 2015 12:39:38 -0700 (PDT) Received: from anchor.com (50-194-63-110-static.hfc.comcastbusiness.net. [50.194.63.110]) by smtp.gmail.com with ESMTPSA id z101sm8772880qge.31.2015.08.17.12.39.37 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 17 Aug 2015 12:39:38 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Mon, 17 Aug 2015 12:38:32 -0700 Message-Id: <1439840320-20897-10-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 2.4.3 In-Reply-To: <1439840320-20897-1-git-send-email-rth@twiddle.net> References: <1439840320-20897-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400d:c04::22e Cc: peter.maydell@linaro.org, Aurelien Jarno Subject: [Qemu-devel] [PATCH 09/17] tcg/optimize: add optimizations for ext_i32_i64 and extu_i32_i64 ops X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Aurelien Jarno They behave the same as ext32s_i64 and ext32u_i64 from the constant folding and zero propagation point of view, except that they can't be replaced by a mov, so we don't compute the affected value. Cc: Richard Henderson Signed-off-by: Aurelien Jarno --- tcg/optimize.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/tcg/optimize.c b/tcg/optimize.c index 8bfe7ff..8f33755 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -343,9 +343,11 @@ static TCGArg do_constant_folding_2(TCGOpcode op, TCGArg x, TCGArg y) CASE_OP_32_64(ext16u): return (uint16_t)x; + case INDEX_op_ext_i32_i64: case INDEX_op_ext32s_i64: return (int32_t)x; + case INDEX_op_extu_i32_i64: case INDEX_op_ext32u_i64: return (uint32_t)x; @@ -830,6 +832,15 @@ void tcg_optimize(TCGContext *s) mask = temps[args[1]].mask & mask; break; + case INDEX_op_ext_i32_i64: + if ((temps[args[1]].mask & 0x80000000) != 0) { + break; + } + case INDEX_op_extu_i32_i64: + /* We do not compute affected as it is a size changing op. */ + mask = (uint32_t)temps[args[1]].mask; + break; + CASE_OP_32_64(andc): /* Known-zeros does not imply known-ones. Therefore unless args[2] is constant, we can't infer anything from it. */ @@ -1008,6 +1019,8 @@ void tcg_optimize(TCGContext *s) CASE_OP_32_64(ext16u): case INDEX_op_ext32s_i64: case INDEX_op_ext32u_i64: + case INDEX_op_ext_i32_i64: + case INDEX_op_extu_i32_i64: if (temp_is_const(args[1])) { tmp = do_constant_folding(opc, temps[args[1]].val, 0); tcg_opt_gen_movi(s, op, args, args[0], tmp);