From patchwork Sun Aug 16 06:21:35 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Crosthwaite X-Patchwork-Id: 507679 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3AB27140187 for ; Sun, 16 Aug 2015 16:22:13 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=qB7vMSS7; dkim-atps=neutral Received: from localhost ([::1]:51582 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZQrKc-0006D2-DT for incoming@patchwork.ozlabs.org; Sun, 16 Aug 2015 02:22:10 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50179) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZQrKN-0005v2-Im for qemu-devel@nongnu.org; Sun, 16 Aug 2015 02:21:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZQrKK-0005Af-Bx for qemu-devel@nongnu.org; Sun, 16 Aug 2015 02:21:55 -0400 Received: from mail-pa0-x22b.google.com ([2607:f8b0:400e:c03::22b]:33956) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZQrKK-0005AZ-4Y for qemu-devel@nongnu.org; Sun, 16 Aug 2015 02:21:52 -0400 Received: by paccq16 with SMTP id cq16so42320562pac.1 for ; Sat, 15 Aug 2015 23:21:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=rFKPF8usU/Pv2EPIkhv26Jrq9xSXuCQsY1kZSrfaJ8A=; b=qB7vMSS7kZMRh1/AkW7HwthSrOtqq7b8PE50TicpU+e0+BAvG9WwZDFj5jSICqZnRJ D3K1tv8Wzcw6ghZrgByKSgJcvF5ZTDLuHVhuvbGyQmkbmlyoHolkenHi2jAuFAi/5tM2 E+uw+Ol8VmVVZ4mzisNDkPOWokcCDlYDO41pYgOA4q5yFQ/tFOAQhKCIoPujSU2KUpiM XYbmEFHi3ZT5KJAGmM+xdXb/Ne32hy2+tKL5OhUULfANYw48BtwiV2wzc/9NeX1UskPA 3eE2fETSuCHs431IMDNttPJ4OUOVh6wEVVdu4ajCwHZ71pAXgM/4UJnTji9OFVYa/8MO BiYg== X-Received: by 10.68.217.102 with SMTP id ox6mr106078731pbc.158.1439706111194; Sat, 15 Aug 2015 23:21:51 -0700 (PDT) Received: from pcrost-box.hsd1.ca.comcast.net (c-50-168-24-48.hsd1.ca.comcast.net. [50.168.24.48]) by smtp.gmail.com with ESMTPSA id h4sm800332pdr.41.2015.08.15.23.21.49 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 15 Aug 2015 23:21:50 -0700 (PDT) From: Peter Crosthwaite X-Google-Original-From: Peter Crosthwaite To: qemu-devel@nongnu.org Date: Sat, 15 Aug 2015 23:21:35 -0700 Message-Id: <1439706095-3628-1-git-send-email-crosthwaite.peter@gmail.com> X-Mailer: git-send-email 1.9.1 X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400e:c03::22b Cc: peter.maydell@linaro.org, Peter Crosthwaite , rth@twiddle.net, sw@weilnetz.de Subject: [Qemu-devel] [RFC PATCH] exec-all: Translate TCI return addresses backwards too X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org I'm trying to debug why TCI doesn't work for the Microblaze example at http://wiki.qemu.org/Testing. My debug led me to the return addresses for exceptions being too far forward and this adjustment looked related so I gave this change a shot, and it works! I did some further-afield image testing, and it turns out that this patch fixes TCI for at least several arches. Here are my test results: ARCH TCI-WITH-PATCH TCI-WITHOUT-PATCH HOST-TCG microblaze Y N (blank) Y cris Y N (K panic) Y arm Y N (halfway) Y aarch64 N (abort) N (abort) Y SH4 Y N (K panic) Y The patch gets you to a linux login prompt on MB,CRIS,ARM and SH4 whereas before the patch various crashes occured. AArch64 has what appears to be a separate issue with TCI. I am use this for testing: http://www.bennee.com/~alex/blog/2014/05/09/running-linux-in-qemus-aarch64-system-emulation-mode/ I don't understand this TCI code fully yet, so I doubt my change is correct, but RFCing incase someone has some theories to help me debug, or justify the change. My debug strategy is to run QEMU both with and without TCI and pass: -d op,exec,in_asm,mmu then filter logs with: s/\(exit_tb\).*$/\1/ s/^\(Trace \)[0-9a-fx]*/\1/ The two logs then give you a nice diff between to TCI and host-TCG run. The first diff I saw was a bad exception return address in the TCI case: IN: PC=20 rmsr=4300 resr=412 rear=c7fffffc debug=0 imm=fffffffc iflags=2100 fsr=0 btaken=1 btarget=c0291d28 mode=kernel(saved=kernel) eip=512 ie=0 r00=00000000 r01=c026ff90 r02=c026de90 r03=deadbeef r04=c7ffe38c r05=00001c74 r06=97ffe38c r07=00001c74 r08=00000000 r09=91fe0000 r10=00000010 r11=c1c8bd94 r12=c1c8bdc0 r13=c027f680 r14=00000000 r15=c0291d20 -r16=00000000 r17=c0291d3c r18=07ffe38c r19=00000000 +r16=00000000 r17=c0291d44 r18=07ffe38c r19=00000000 r20=00000000 r21=00000000 r22=00001c70 r23=c026ffac r24=00000000 r25=00000000 r26=00000000 r27=00000000 r28=00000000 r29=01000000 r30=00000380 r31=c02722f8 In Microblaze, PC=20 is the MMU fault exception vector and R17 is the exception return address. The faulting instruction is at 0xc0291d2c as shown by the host-TCG run (-) but TCI has it at 0xc0291d44 (+). It is a store: 0xc0291d38: andi r22, r22, -4 0xc0291d3c: sw r3, r4, r22 0xc0291d40: imm -15928 0xc0291d44: lwi r8, r0, -10452 Signed-off-by: Peter Crosthwaite Reviewed-by: Richard Henderson --- include/exec/exec-all.h | 4 ---- 1 file changed, 4 deletions(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index a6fce04..31c2405 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -308,11 +308,7 @@ extern uintptr_t tci_tb_ptr; to indicate the compressed mode; subtracting two works around that. It is also the case that there are no host isas that contain a call insn smaller than 4 bytes, so we don't worry about special-casing this. */ -#if defined(CONFIG_TCG_INTERPRETER) -# define GETPC_ADJ 0 -#else # define GETPC_ADJ 2 -#endif #define GETPC() (GETRA() - GETPC_ADJ)