From patchwork Wed Jun 17 10:42:47 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Graf X-Patchwork-Id: 485323 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 86E61140284 for ; Wed, 17 Jun 2015 20:44:03 +1000 (AEST) Received: from localhost ([::1]:45533 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z5Ap4-0005hC-ET for incoming@patchwork.ozlabs.org; Wed, 17 Jun 2015 06:43:58 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55484) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z5AoN-0004a5-0g for qemu-devel@nongnu.org; Wed, 17 Jun 2015 06:43:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z5AoJ-0005V4-Ol for qemu-devel@nongnu.org; Wed, 17 Jun 2015 06:43:14 -0400 Received: from cantor2.suse.de ([195.135.220.15]:52250 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z5AoJ-0005Uh-Hj for qemu-devel@nongnu.org; Wed, 17 Jun 2015 06:43:11 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (charybdis-ext.suse.de [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id 6145A75017; Wed, 17 Jun 2015 10:43:10 +0000 (UTC) From: Alexander Graf To: qemu-devel@nongnu.org Date: Wed, 17 Jun 2015 12:42:47 +0200 Message-Id: <1434537789-63782-5-git-send-email-agraf@suse.de> X-Mailer: git-send-email 1.7.12.4 In-Reply-To: <1434537789-63782-1-git-send-email-agraf@suse.de> References: <1434537789-63782-1-git-send-email-agraf@suse.de> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x (no timestamps) [generic] X-Received-From: 195.135.220.15 Cc: peter.maydell@linaro.org, Aurelien Jarno Subject: [Qemu-devel] [PULL 04/26] target-s390x: fix setcc in TCG mode X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Aurelien Jarno In TCG mode we should store the CC value in env->cc_op. However do it inconditionnaly because: - the tcg_enabled function is not inlined - it's probably faster to always store the value, especially given it is likely in the same cache line than env->psw.mask. Signed-off-by: Aurelien Jarno Signed-off-by: Alexander Graf --- target-s390x/cpu.h | 1 + 1 file changed, 1 insertion(+) diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h index c20ef05..66bd639 100644 --- a/target-s390x/cpu.h +++ b/target-s390x/cpu.h @@ -709,6 +709,7 @@ static inline void setcc(S390CPU *cpu, uint64_t cc) env->psw.mask &= ~(3ull << 44); env->psw.mask |= (cc & 3) << 44; + env->cc_op = cc; } typedef struct LowCore