From patchwork Mon Jun 15 17:24:36 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 484470 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 7F38414029E for ; Tue, 16 Jun 2015 03:36:05 +1000 (AEST) Received: from localhost ([::1]:35699 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z4YIl-00024A-MG for incoming@patchwork.ozlabs.org; Mon, 15 Jun 2015 13:36:03 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60972) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z4Y8J-0007k8-Gs for qemu-devel@nongnu.org; Mon, 15 Jun 2015 13:25:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z4Y8H-0001Ww-T2 for qemu-devel@nongnu.org; Mon, 15 Jun 2015 13:25:15 -0400 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:34471) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z4Y8H-0001AA-KZ for qemu-devel@nongnu.org; Mon, 15 Jun 2015 13:25:13 -0400 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1Z4Y82-0003Vb-J4 for qemu-devel@nongnu.org; Mon, 15 Jun 2015 18:24:58 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Mon, 15 Jun 2015 18:24:36 +0100 Message-Id: <1434389098-13430-7-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1434389098-13430-1-git-send-email-peter.maydell@linaro.org> References: <1434389098-13430-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2001:8b0:1d0::1 Subject: [Qemu-devel] [PULL 06/28] target-arm/kvm64: Add cortex-a53 cpu support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Shannon Zhao Since commit e353102(target-arm: cpu64: Add support for Cortex-A53) has added Cortex-A53 cpu support for target-arm, this patch just enables it for kvm-arm. Here adding XGENE_POTENZA just makes the enum continuous. Signed-off-by: Shannon Zhao Signed-off-by: Shannon Zhao Message-id: 1433207452-4512-2-git-send-email-shannon.zhao@linaro.org [PMM: Don't add the CPU types to cpus_to_try[]; this array only lists old CPUs which were supported in pre-PREFERRED_TARGET kernels] Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target-arm/cpu64.c | 1 + target-arm/kvm-consts.h | 4 ++++ 2 files changed, 5 insertions(+) diff --git a/target-arm/cpu64.c b/target-arm/cpu64.c index bf7dd68..dd6f9d8 100644 --- a/target-arm/cpu64.c +++ b/target-arm/cpu64.c @@ -159,6 +159,7 @@ static void aarch64_a53_initfn(Object *obj) set_feature(&cpu->env, ARM_FEATURE_V8_SHA256); set_feature(&cpu->env, ARM_FEATURE_V8_PMULL); set_feature(&cpu->env, ARM_FEATURE_CRC); + cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A53; cpu->midr = 0x410fd034; cpu->reset_fpsid = 0x41034070; cpu->mvfr0 = 0x10110222; diff --git a/target-arm/kvm-consts.h b/target-arm/kvm-consts.h index aea12f1..943bf89 100644 --- a/target-arm/kvm-consts.h +++ b/target-arm/kvm-consts.h @@ -127,6 +127,8 @@ MISMATCH_CHECK(QEMU_PSCI_RET_DISABLED, PSCI_RET_DISABLED) #define QEMU_KVM_ARM_TARGET_AEM_V8 0 #define QEMU_KVM_ARM_TARGET_FOUNDATION_V8 1 #define QEMU_KVM_ARM_TARGET_CORTEX_A57 2 +#define QEMU_KVM_ARM_TARGET_XGENE_POTENZA 3 +#define QEMU_KVM_ARM_TARGET_CORTEX_A53 4 /* There's no kernel define for this: sentinel value which * matches no KVM target value for either 64 or 32 bit @@ -137,6 +139,8 @@ MISMATCH_CHECK(QEMU_PSCI_RET_DISABLED, PSCI_RET_DISABLED) MISMATCH_CHECK(QEMU_KVM_ARM_TARGET_AEM_V8, KVM_ARM_TARGET_AEM_V8) MISMATCH_CHECK(QEMU_KVM_ARM_TARGET_FOUNDATION_V8, KVM_ARM_TARGET_FOUNDATION_V8) MISMATCH_CHECK(QEMU_KVM_ARM_TARGET_CORTEX_A57, KVM_ARM_TARGET_CORTEX_A57) +MISMATCH_CHECK(QEMU_KVM_ARM_TARGET_XGENE_POTENZA, KVM_ARM_TARGET_XGENE_POTENZA) +MISMATCH_CHECK(QEMU_KVM_ARM_TARGET_CORTEX_A53, KVM_ARM_TARGET_CORTEX_A53) #else MISMATCH_CHECK(QEMU_KVM_ARM_TARGET_CORTEX_A15, KVM_ARM_TARGET_CORTEX_A15) MISMATCH_CHECK(QEMU_KVM_ARM_TARGET_CORTEX_A7, KVM_ARM_TARGET_CORTEX_A7)