diff mbox

[02/13] target-mips: add microMIPS TLBINV, TLBINVF

Message ID 1434117743-53520-3-git-send-email-yongbok.kim@imgtec.com
State New
Headers show

Commit Message

Yongbok Kim June 12, 2015, 2:02 p.m. UTC
add microMIPS TLBINV, TLBINVF

Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
---
 target-mips/translate.c |    8 ++++++++
 1 files changed, 8 insertions(+), 0 deletions(-)

Comments

Aurelien Jarno June 15, 2015, 11:50 a.m. UTC | #1
On 2015-06-12 15:02, Yongbok Kim wrote:
> add microMIPS TLBINV, TLBINVF
> 
> Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
> ---
>  target-mips/translate.c |    8 ++++++++
>  1 files changed, 8 insertions(+), 0 deletions(-)
> 
> diff --git a/target-mips/translate.c b/target-mips/translate.c
> index d4a530d..b8c7164 100644
> --- a/target-mips/translate.c
> +++ b/target-mips/translate.c
> @@ -11991,6 +11991,8 @@ enum {
>      TLBR = 0x1,
>      TLBWI = 0x2,
>      TLBWR = 0x3,
> +    TLBINV = 0x4,
> +    TLBINVF = 0x5,
>      WAIT = 0x9,
>      IRET = 0xd,
>      DERET = 0xe,
> @@ -12775,6 +12777,12 @@ static void gen_pool32axf (CPUMIPSState *env, DisasContext *ctx, int rt, int rs)
>          case TLBWR:
>              mips32_op = OPC_TLBWR;
>              goto do_cp0;
> +        case TLBINV:
> +            mips32_op = OPC_TLBINV;
> +            goto do_cp0;
> +        case TLBINVF:
> +            mips32_op = OPC_TLBINVF;
> +            goto do_cp0;
>          case WAIT:
>              mips32_op = OPC_WAIT;
>              goto do_cp0;

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Leon Alrae June 15, 2015, 4:19 p.m. UTC | #2
On 12/06/2015 15:02, Yongbok Kim wrote:
> add microMIPS TLBINV, TLBINVF
> 
> Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
> ---
>  target-mips/translate.c |    8 ++++++++
>  1 files changed, 8 insertions(+), 0 deletions(-)

Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
diff mbox

Patch

diff --git a/target-mips/translate.c b/target-mips/translate.c
index d4a530d..b8c7164 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -11991,6 +11991,8 @@  enum {
     TLBR = 0x1,
     TLBWI = 0x2,
     TLBWR = 0x3,
+    TLBINV = 0x4,
+    TLBINVF = 0x5,
     WAIT = 0x9,
     IRET = 0xd,
     DERET = 0xe,
@@ -12775,6 +12777,12 @@  static void gen_pool32axf (CPUMIPSState *env, DisasContext *ctx, int rt, int rs)
         case TLBWR:
             mips32_op = OPC_TLBWR;
             goto do_cp0;
+        case TLBINV:
+            mips32_op = OPC_TLBINV;
+            goto do_cp0;
+        case TLBINVF:
+            mips32_op = OPC_TLBINVF;
+            goto do_cp0;
         case WAIT:
             mips32_op = OPC_WAIT;
             goto do_cp0;