From patchwork Thu Jun 4 23:41:47 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Graf X-Patchwork-Id: 480960 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 2167C1401DE for ; Fri, 5 Jun 2015 09:58:19 +1000 (AEST) Received: from localhost ([::1]:44653 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z0f1d-0000BE-AA for incoming@patchwork.ozlabs.org; Thu, 04 Jun 2015 19:58:17 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56715) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z0em7-0003Z9-Ko for qemu-devel@nongnu.org; Thu, 04 Jun 2015 19:42:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z0em3-00023A-LQ for qemu-devel@nongnu.org; Thu, 04 Jun 2015 19:42:15 -0400 Received: from cantor2.suse.de ([195.135.220.15]:48817 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z0em3-000216-Ew for qemu-devel@nongnu.org; Thu, 04 Jun 2015 19:42:11 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay1.suse.de (charybdis-ext.suse.de [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id 8CC82ADB6; Thu, 4 Jun 2015 23:42:05 +0000 (UTC) From: Alexander Graf To: qemu-devel@nongnu.org Date: Fri, 5 Jun 2015 01:41:47 +0200 Message-Id: <1433461324-23584-18-git-send-email-agraf@suse.de> X-Mailer: git-send-email 1.7.12.4 In-Reply-To: <1433461324-23584-1-git-send-email-agraf@suse.de> References: <1433461324-23584-1-git-send-email-agraf@suse.de> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x (no timestamps) [generic] X-Received-From: 195.135.220.15 Cc: peter.maydell@linaro.org, aurel@aurel32.net, Aurelien Jarno , rth@twiddle.net Subject: [Qemu-devel] [PULL 17/34] target-s390x: implement LAY and LAEY instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Aurelien Jarno This complete the general-instructions-extension facility, enable it. Signed-off-by: Aurelien Jarno [agraf: remove facility bit] Signed-off-by: Alexander Graf --- target-s390x/insn-data.def | 3 +++ target-s390x/translate.c | 35 +++++++++++++++++++++++++++++++++++ 2 files changed, 38 insertions(+) diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def index e10aa6b..7507062 100644 --- a/target-s390x/insn-data.def +++ b/target-s390x/insn-data.def @@ -357,6 +357,9 @@ /* LOAD ADDRESS */ C(0x4100, LA, RX_a, Z, 0, a2, 0, r1, mov2, 0) C(0xe371, LAY, RXY_a, LD, 0, a2, 0, r1, mov2, 0) +/* LOAD ADDRESS EXTENDED */ + C(0x5100, LAE, RX_a, Z, 0, a2, 0, r1, mov2e, 0) + C(0xe375, LAEY, RXY_a, GIE, 0, a2, 0, r1, mov2e, 0) /* LOAD ADDRESS RELATIVE LONG */ C(0xc000, LARL, RIL_b, Z, 0, ri2, 0, r1, mov2, 0) /* LOAD AND ADD */ diff --git a/target-s390x/translate.c b/target-s390x/translate.c index 63885f8..d508bc2 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -2596,6 +2596,41 @@ static ExitStatus op_mov2(DisasContext *s, DisasOps *o) return NO_EXIT; } +static ExitStatus op_mov2e(DisasContext *s, DisasOps *o) +{ + int b2 = get_field(s->fields, b2); + TCGv ar1 = tcg_temp_new_i64(); + + o->out = o->in2; + o->g_out = o->g_in2; + TCGV_UNUSED_I64(o->in2); + o->g_in2 = false; + + switch (s->tb->flags & FLAG_MASK_ASC) { + case PSW_ASC_PRIMARY >> 32: + tcg_gen_movi_i64(ar1, 0); + break; + case PSW_ASC_ACCREG >> 32: + tcg_gen_movi_i64(ar1, 1); + break; + case PSW_ASC_SECONDARY >> 32: + if (b2) { + tcg_gen_ld32u_i64(ar1, cpu_env, offsetof(CPUS390XState, aregs[b2])); + } else { + tcg_gen_movi_i64(ar1, 0); + } + break; + case PSW_ASC_HOME >> 32: + tcg_gen_movi_i64(ar1, 2); + break; + } + + tcg_gen_st32_i64(ar1, cpu_env, offsetof(CPUS390XState, aregs[1])); + tcg_temp_free_i64(ar1); + + return NO_EXIT; +} + static ExitStatus op_movx(DisasContext *s, DisasOps *o) { o->out = o->in1;