From patchwork Sun May 24 10:51:03 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christoffer Dall X-Patchwork-Id: 475962 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 37C3A1402C0 for ; Sun, 24 May 2015 20:51:22 +1000 (AEST) Received: from localhost ([::1]:39704 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YwTV2-0007jp-FD for incoming@patchwork.ozlabs.org; Sun, 24 May 2015 06:51:20 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58390) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YwTUZ-0006sO-EQ for qemu-devel@nongnu.org; Sun, 24 May 2015 06:50:55 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YwTUV-0008Uf-He for qemu-devel@nongnu.org; Sun, 24 May 2015 06:50:51 -0400 Received: from mail-lb0-f174.google.com ([209.85.217.174]:36535) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YwTUV-0008Ua-7A for qemu-devel@nongnu.org; Sun, 24 May 2015 06:50:47 -0400 Received: by lbbqq2 with SMTP id qq2so36962627lbb.3 for ; Sun, 24 May 2015 03:50:46 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=A+BJuVgDQSHgZeqiT82bV8fc3L6gF24EC6pe5z0OcV0=; b=mGkqhug9PoN+J+8qs3vTYmFFLhcQhpPCiJJH9WyDyuNkThXrbPeDYGSHVnf8oGhdzs JGRoD3o7gVeH88vDj9wDfz5mGFaV5076Eo3BsDAHS6htjIsUK09Cf9s2mVFTsOItEmTm Bam1uyfOvyFCXaeblkXUN+qLdTboBu6VI+Ude3yr+H9zsZAkfFrZowsWWa8685PsWv+s O3MReUp2qILNfSntUimeEG6JoaWbzh9tYz4Yk3JXGFDbvoPR+2dAXPR1B0FYSdMVFoZQ 5cX+Z7UFAANk210evgQfTZfr05dYz8DEce6P07krjVmCYyLUPwYCnu7qWydBEKFtGSOC yDKQ== X-Gm-Message-State: ALoCoQkCWJTuGNUt6LM+v09+O6ZjgkXLvb7nFMta8wGIDU1ObFl7gf+x3FVXlP4LRKnX50HuoMim X-Received: by 10.152.23.66 with SMTP id k2mr13952981laf.89.1432464646392; Sun, 24 May 2015 03:50:46 -0700 (PDT) Received: from localhost.localdomain (188-178-240-98-static.dk.customer.tdc.net. [188.178.240.98]) by mx.google.com with ESMTPSA id am7sm1689944lbc.3.2015.05.24.03.50.44 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 24 May 2015 03:50:45 -0700 (PDT) From: Christoffer Dall To: qemu-devel@nongnu.org Date: Sun, 24 May 2015 12:51:03 +0200 Message-Id: <1432464666-4825-2-git-send-email-christoffer.dall@linaro.org> X-Mailer: git-send-email 2.1.2.330.g565301e.dirty In-Reply-To: <1432464666-4825-1-git-send-email-christoffer.dall@linaro.org> References: <1432464666-4825-1-git-send-email-christoffer.dall@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.217.174 Cc: kvmarm@lists.cs.columbia.edu, Christoffer Dall , eric.auger@linaro.org Subject: [Qemu-devel] [PATCH v3 1/4] target-arm: Add GIC phandle to VirtBoardInfo X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Instead of passing the GIC phandle around between functions, add it to the VirtBoardInfo just like we do for the clock_phandle. We are about to add the v2m phandle as well, and it's easier not having to pass around a bunch of phandles, return multiple values from functions, etc. Reviewed-by: Peter Maydell Signed-off-by: Christoffer Dall Reviewed-by: Eric Auger --- Changes since v2: - None Changes since v1: - Added reviewed-by tag hw/arm/virt.c | 26 +++++++++++--------------- 1 file changed, 11 insertions(+), 15 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index a7f9a10..f9f7482 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -87,6 +87,7 @@ typedef struct VirtBoardInfo { void *fdt; int fdt_size; uint32_t clock_phandle; + uint32_t gic_phandle; } VirtBoardInfo; typedef struct { @@ -322,12 +323,11 @@ static void fdt_add_cpu_nodes(const VirtBoardInfo *vbi) } } -static uint32_t fdt_add_gic_node(const VirtBoardInfo *vbi) +static void fdt_add_gic_node(VirtBoardInfo *vbi) { - uint32_t gic_phandle; - gic_phandle = qemu_fdt_alloc_phandle(vbi->fdt); - qemu_fdt_setprop_cell(vbi->fdt, "/", "interrupt-parent", gic_phandle); + vbi->gic_phandle = qemu_fdt_alloc_phandle(vbi->fdt); + qemu_fdt_setprop_cell(vbi->fdt, "/", "interrupt-parent", vbi->gic_phandle); qemu_fdt_add_subnode(vbi->fdt, "/intc"); /* 'cortex-a15-gic' means 'GIC v2' */ @@ -340,12 +340,10 @@ static uint32_t fdt_add_gic_node(const VirtBoardInfo *vbi) 2, vbi->memmap[VIRT_GIC_DIST].size, 2, vbi->memmap[VIRT_GIC_CPU].base, 2, vbi->memmap[VIRT_GIC_CPU].size); - qemu_fdt_setprop_cell(vbi->fdt, "/intc", "phandle", gic_phandle); - - return gic_phandle; + qemu_fdt_setprop_cell(vbi->fdt, "/intc", "phandle", vbi->gic_phandle); } -static uint32_t create_gic(const VirtBoardInfo *vbi, qemu_irq *pic) +static void create_gic(VirtBoardInfo *vbi, qemu_irq *pic) { /* We create a standalone GIC v2 */ DeviceState *gicdev; @@ -394,7 +392,7 @@ static uint32_t create_gic(const VirtBoardInfo *vbi, qemu_irq *pic) pic[i] = qdev_get_gpio_in(gicdev, i); } - return fdt_add_gic_node(vbi); + fdt_add_gic_node(vbi); } static void create_uart(const VirtBoardInfo *vbi, qemu_irq *pic) @@ -641,8 +639,7 @@ static void create_pcie_irq_map(const VirtBoardInfo *vbi, uint32_t gic_phandle, 0x7 /* PCI irq */); } -static void create_pcie(const VirtBoardInfo *vbi, qemu_irq *pic, - uint32_t gic_phandle) +static void create_pcie(const VirtBoardInfo *vbi, qemu_irq *pic) { hwaddr base = vbi->memmap[VIRT_PCIE].base; hwaddr size = vbi->memmap[VIRT_PCIE].size; @@ -714,7 +711,7 @@ static void create_pcie(const VirtBoardInfo *vbi, qemu_irq *pic, 2, base_mmio, 2, size_mmio); qemu_fdt_setprop_cell(vbi->fdt, nodename, "#interrupt-cells", 1); - create_pcie_irq_map(vbi, gic_phandle, irq, nodename); + create_pcie_irq_map(vbi, vbi->gic_phandle, irq, nodename); g_free(nodename); } @@ -736,7 +733,6 @@ static void machvirt_init(MachineState *machine) MemoryRegion *ram = g_new(MemoryRegion, 1); const char *cpu_model = machine->cpu_model; VirtBoardInfo *vbi; - uint32_t gic_phandle; char **cpustr; if (!cpu_model) { @@ -813,13 +809,13 @@ static void machvirt_init(MachineState *machine) create_flash(vbi); - gic_phandle = create_gic(vbi, pic); + create_gic(vbi, pic); create_uart(vbi, pic); create_rtc(vbi, pic); - create_pcie(vbi, pic, gic_phandle); + create_pcie(vbi, pic); /* Create mmio transports, so the user can create virtio backends * (which will be automatically plugged in to the transports). If