From patchwork Wed May 13 06:52:37 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Edgar E. Iglesias" X-Patchwork-Id: 471713 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id BBD0B140D1A for ; Wed, 13 May 2015 17:04:13 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=MJbmTwMA; dkim-atps=neutral Received: from localhost ([::1]:46718 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YsQiB-0001Qx-Ul for incoming@patchwork.ozlabs.org; Wed, 13 May 2015 03:04:11 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40276) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YsQhp-0000qK-0Q for qemu-devel@nongnu.org; Wed, 13 May 2015 03:03:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YsQhi-0003GT-MH for qemu-devel@nongnu.org; Wed, 13 May 2015 03:03:48 -0400 Received: from mail-qk0-x230.google.com ([2607:f8b0:400d:c09::230]:33871) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YsQhi-0003GF-Gy for qemu-devel@nongnu.org; Wed, 13 May 2015 03:03:42 -0400 Received: by qkgx75 with SMTP id x75so22391069qkg.1 for ; Wed, 13 May 2015 00:03:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=niDfq+rEiX7iE4aCLwgq7h9HN+QDtCETq4I143kDNtw=; b=MJbmTwMAtw7BjDGVezX7PTeHzffAP6y+XC4Lur//YNunrXF0JamrFJ6V4kGR3mMR7c VLHP3HPJGZrr/pTn+Lz4r6V5Hp6m6F40/tH6HyalLn7nJT5zYinhf6uiwmog0Ojp6yU1 OsxAIdNwmyaHWlDosWpqeP2EMFwSDQKGJ3GJ45jLVePb4DN4nObl+SGMxd5cGffncRiU R730flI6xt3xJ1Ac2OtMkBHmFn94zfzswyR3l3ZunmXadK2LBq8EmMEQYDN2WGbUppkl moN3LFPqHkf/FvQK21cx202+0tF8lpvZ0gY2j8cBNXTRE2t59K2wTJA2qhKPIEHBaL+0 wWkQ== X-Received: by 10.55.41.170 with SMTP id p42mr41027826qkp.106.1431500622116; Wed, 13 May 2015 00:03:42 -0700 (PDT) Received: from localhost ([203.126.243.116]) by mx.google.com with ESMTPSA id k71sm14990061qhc.42.2015.05.13.00.03.40 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Wed, 13 May 2015 00:03:41 -0700 (PDT) From: "Edgar E. Iglesias" To: qemu-devel@nongnu.org, peter.maydell@linaro.org Date: Wed, 13 May 2015 16:52:37 +1000 Message-Id: <1431499963-1019-13-git-send-email-edgar.iglesias@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1431499963-1019-1-git-send-email-edgar.iglesias@gmail.com> References: <1431499963-1019-1-git-send-email-edgar.iglesias@gmail.com> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400d:c09::230 Cc: edgar.iglesias@xilinx.com, serge.fdrv@gmail.com, alex.bennee@linaro.org, agraf@suse.de, greg.bellows@linaro.org Subject: [Qemu-devel] [PATCH v1 12/18] target-arm: Add TLBI_VAE2{IS} X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: "Edgar E. Iglesias" Signed-off-by: Edgar E. Iglesias --- target-arm/helper.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/target-arm/helper.c b/target-arm/helper.c index d57e0af..7ad9133 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -2644,6 +2644,14 @@ static const ARMCPRegInfo v8_el2_cp_reginfo[] = { .opc0 = 1, .opc1 = 4, .crn = 8, .crm = 7, .opc2 = 0, .type = ARM_CP_NO_RAW, .access = PL2_W, .writefn = tlbiall_write }, + { .name = "TLBI_VAE2", .state = ARM_CP_STATE_AA64, + .opc0 = 1, .opc1 = 4, .crn = 8, .crm = 7, .opc2 = 1, + .type = ARM_CP_NO_RAW, .access = PL2_W, + .writefn = tlbi_aa64_vaa_write }, + { .name = "TLBI_VAE2IS", .state = ARM_CP_STATE_AA64, + .opc0 = 1, .opc1 = 4, .crn = 8, .crm = 3, .opc2 = 1, + .type = ARM_CP_NO_RAW, .access = PL2_W, + .writefn = tlbi_aa64_vaa_write }, { .name = "TPIDR_EL2", .state = ARM_CP_STATE_AA64, .opc0 = 3, .opc1 = 4, .opc2 = 2, .crn = 13, .crm = 0, .access = PL2_RW, .resetvalue = 0,