From patchwork Tue May 12 22:36:13 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Snow X-Patchwork-Id: 471600 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 96725140A99 for ; Wed, 13 May 2015 08:36:47 +1000 (AEST) Received: from localhost ([::1]:45545 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YsIn7-0008IP-Ol for incoming@patchwork.ozlabs.org; Tue, 12 May 2015 18:36:45 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41307) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YsImh-0007hP-Vv for qemu-devel@nongnu.org; Tue, 12 May 2015 18:36:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YsImf-0002Fl-Kv for qemu-devel@nongnu.org; Tue, 12 May 2015 18:36:19 -0400 Received: from mx1.redhat.com ([209.132.183.28]:56394) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YsImf-0002FK-EQ for qemu-devel@nongnu.org; Tue, 12 May 2015 18:36:17 -0400 Received: from int-mx09.intmail.prod.int.phx2.redhat.com (int-mx09.intmail.prod.int.phx2.redhat.com [10.5.11.22]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id t4CMaGdD001721 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL) for ; Tue, 12 May 2015 18:36:16 -0400 Received: from scv.usersys.redhat.com (dhcp-17-29.bos.redhat.com [10.18.17.29]) by int-mx09.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id t4CMaFki015204; Tue, 12 May 2015 18:36:16 -0400 From: John Snow To: qemu-devel@nongnu.org Date: Tue, 12 May 2015 18:36:13 -0400 Message-Id: <1431470173-30847-2-git-send-email-jsnow@redhat.com> In-Reply-To: <1431470173-30847-1-git-send-email-jsnow@redhat.com> References: <1431470173-30847-1-git-send-email-jsnow@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.22 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 209.132.183.28 Cc: pbonzini@redhat.com, John Snow , stefanha@redhat.com Subject: [Qemu-devel] [PATCH 1/1] ahci: do not remap clb/fis unconditionally X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This continues the IOMMU fix from 2.3, where we should not attempt to remap the CLB or FIS RX buffers if the AHCI device is currently running. The same applies to migration: keep our mitts off these registers unless the device is supposed to be on. Does not impact backwards compatibility for the AHCI device. Signed-off-by: John Snow --- hw/ide/ahci.c | 88 ++++++++++++++++++++++++++++++++++++++++++----------------- 1 file changed, 63 insertions(+), 25 deletions(-) diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c index 8e36dec..9e5d862 100644 --- a/hw/ide/ahci.c +++ b/hw/ide/ahci.c @@ -198,6 +198,61 @@ static void map_page(AddressSpace *as, uint8_t **ptr, uint64_t addr, } } +/** + * Check the cmd register to see if we should start or stop + * the DMA or FIS RX engines. + * + * @ad: Device to engage. + * @allow_stop: Allow device to transition from started to stopped? + * 'no' is useful for migration post_load, which does not expect a transition. + * + * @return 0 on success, -1 on error. + */ +static int ahci_cond_start_engines(AHCIDevice *ad, bool allow_stop) +{ + AHCIPortRegs *pr = &ad->port_regs; + + if (pr->cmd & PORT_CMD_START) { + if (ahci_map_clb_address(ad)) { + pr->cmd |= PORT_CMD_LIST_ON; + } else { + error_report("AHCI: Failed to start DMA engine: " + "bad command list buffer address"); + return -1; + } + } else if (pr->cmd & PORT_CMD_LIST_ON) { + if (allow_stop) { + ahci_unmap_clb_address(ad); + pr->cmd = pr->cmd & ~(PORT_CMD_LIST_ON); + } else { + error_report("AHCI: DMA engine should be off, " + "but appears to still be running"); + return -1; + } + } + + if (pr->cmd & PORT_CMD_FIS_RX) { + if (ahci_map_fis_address(ad)) { + pr->cmd |= PORT_CMD_FIS_ON; + } else { + error_report("AHCI: Failed to start FIS receive engine: " + "bad FIS receive buffer address"); + return -1; + } + } else if (pr->cmd & PORT_CMD_FIS_ON) { + if (allow_stop) { + ahci_unmap_fis_address(ad); + pr->cmd = pr->cmd & ~(PORT_CMD_FIS_ON); + } else { + error_report("AHCI: FIS receive engine should be off, " + "but appears to still be running"); + return -1; + } + } + + return 0; +} + static void ahci_port_write(AHCIState *s, int port, int offset, uint32_t val) { AHCIPortRegs *pr = &s->dev[port].port_regs; @@ -229,29 +284,8 @@ static void ahci_port_write(AHCIState *s, int port, int offset, uint32_t val) * including LIST_ON and FIS_ON. */ pr->cmd = (pr->cmd & PORT_CMD_RO_MASK) | (val & ~PORT_CMD_RO_MASK); - if (pr->cmd & PORT_CMD_START) { - if (ahci_map_clb_address(&s->dev[port])) { - pr->cmd |= PORT_CMD_LIST_ON; - } else { - error_report("AHCI: Failed to start DMA engine: " - "bad command list buffer address"); - } - } else if (pr->cmd & PORT_CMD_LIST_ON) { - ahci_unmap_clb_address(&s->dev[port]); - pr->cmd = pr->cmd & ~(PORT_CMD_LIST_ON); - } - - if (pr->cmd & PORT_CMD_FIS_RX) { - if (ahci_map_fis_address(&s->dev[port])) { - pr->cmd |= PORT_CMD_FIS_ON; - } else { - error_report("AHCI: Failed to start FIS receive engine: " - "bad FIS receive buffer address"); - } - } else if (pr->cmd & PORT_CMD_FIS_ON) { - ahci_unmap_fis_address(&s->dev[port]); - pr->cmd = pr->cmd & ~(PORT_CMD_FIS_ON); - } + /* Check FIS RX and CLB engines, allow transition to false: */ + ahci_cond_start_engines(&s->dev[port], true); /* XXX usually the FIS would be pending on the bus here and issuing deferred until the OS enables FIS receival. @@ -1404,8 +1438,12 @@ static int ahci_state_post_load(void *opaque, int version_id) for (i = 0; i < s->ports; i++) { ad = &s->dev[i]; - ahci_map_clb_address(ad); - ahci_map_fis_address(ad); + /* Only remap the CLB address if appropriate, disallowing a state + * transition from 'on' to 'off' it should be consistent here. */ + if (ahci_cond_start_engines(ad, false) != 0) { + return -1; + } + /* * If an error is present, ad->busy_slot will be valid and not -1. * In this case, an operation is waiting to resume and will re-check