From patchwork Mon Apr 27 15:20:45 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 465078 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 980AE1402B6 for ; Tue, 28 Apr 2015 01:21:36 +1000 (AEST) Received: from localhost ([::1]:55742 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ymkqk-0005Go-Dv for incoming@patchwork.ozlabs.org; Mon, 27 Apr 2015 11:21:34 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37751) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ymkq8-0004AW-7m for qemu-devel@nongnu.org; Mon, 27 Apr 2015 11:20:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Ymkq5-0003Zr-Ra for qemu-devel@nongnu.org; Mon, 27 Apr 2015 11:20:56 -0400 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:34016) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ymkq5-0003Ym-LA for qemu-devel@nongnu.org; Mon, 27 Apr 2015 11:20:53 -0400 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1Ymkpy-0008SP-CV for qemu-devel@nongnu.org; Mon, 27 Apr 2015 16:20:46 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Mon, 27 Apr 2015 16:20:45 +0100 Message-Id: <1430148045-32400-18-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1430148045-32400-1-git-send-email-peter.maydell@linaro.org> References: <1430148045-32400-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2001:8b0:1d0::1 Subject: [Qemu-devel] [PULL 17/17] Allow ARMv8 SCR.SMD updates X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Greg Bellows Updated scr_write to always allow updates to the SCR.SMD bit on ARMv8 regardless of whether virtualization (EL2) is enabled or not. Signed-off-by: Greg Bellows Message-id: 1429888797-4378-1-git-send-email-greg.bellows@linaro.org Signed-off-by: Peter Maydell --- target-arm/helper.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 0ac6ff1..f8f8d76 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -816,8 +816,10 @@ static void scr_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value) * supported if EL2 exists. The bit is UNK/SBZP when * EL2 is unavailable. In QEMU ARMv7, we force it to always zero * when EL2 is unavailable. + * On ARMv8, this bit is always available. */ - if (arm_feature(env, ARM_FEATURE_V7)) { + if (arm_feature(env, ARM_FEATURE_V7) && + !arm_feature(env, ARM_FEATURE_V8)) { valid_mask &= ~SCR_SMD; } }