From patchwork Fri Apr 24 10:39:41 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: James Hogan X-Patchwork-Id: 464168 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id E996514016A for ; Fri, 24 Apr 2015 20:40:51 +1000 (AEST) Received: from localhost ([::1]:44080 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ylb2N-0006xF-Te for incoming@patchwork.ozlabs.org; Fri, 24 Apr 2015 06:40:47 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57817) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ylb1z-0006fV-C5 for qemu-devel@nongnu.org; Fri, 24 Apr 2015 06:40:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Ylb1u-0004mQ-Pm for qemu-devel@nongnu.org; Fri, 24 Apr 2015 06:40:23 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:61703) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ylb1u-0004mM-KO for qemu-devel@nongnu.org; Fri, 24 Apr 2015 06:40:18 -0400 Received: from KLMAIL01.kl.imgtec.org (unknown [192.168.5.35]) by Websense Email Security Gateway with ESMTPS id 8D4A4C48594FC; Fri, 24 Apr 2015 11:40:15 +0100 (IST) Received: from LEMAIL01.le.imgtec.org (192.168.152.62) by KLMAIL01.kl.imgtec.org (192.168.5.35) with Microsoft SMTP Server (TLS) id 14.3.195.1; Fri, 24 Apr 2015 11:40:17 +0100 Received: from jhogan-linux.le.imgtec.org (192.168.154.110) by LEMAIL01.le.imgtec.org (192.168.152.62) with Microsoft SMTP Server (TLS) id 14.3.210.2; Fri, 24 Apr 2015 11:40:16 +0100 From: James Hogan To: , Paolo Bonzini Date: Fri, 24 Apr 2015 11:39:41 +0100 Message-ID: <1429871981-25453-1-git-send-email-james.hogan@imgtec.com> X-Mailer: git-send-email 2.0.5 In-Reply-To: <1427279034-9459-7-git-send-email-james.hogan@imgtec.com> References: <1427279034-9459-7-git-send-email-james.hogan@imgtec.com> MIME-Version: 1.0 X-Originating-IP: [192.168.154.110] X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 195.59.15.196 Cc: James Hogan , Leon Alrae , Aurelien Jarno Subject: [Qemu-devel] [PATCH v3 6/9] mips/kvm: Support unsigned KVM registers X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Add KVM register access functions for the uint32_t type. This is required for FP and MSA control registers, which are represented as unsigned 32-bit integers. Signed-off-by: James Hogan Cc: Paolo Bonzini Cc: Leon Alrae Cc: Aurelien Jarno --- Changes in v3: - Fix big endian (the pointer passed to the kernel must be for the actual 32-bit value, not a temporary 64-bit value, otherwise on big endian systems the kernel will only interpret the upper half). --- target-mips/kvm.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/target-mips/kvm.c b/target-mips/kvm.c index ead8c5f73930..826709f66896 100644 --- a/target-mips/kvm.c +++ b/target-mips/kvm.c @@ -243,6 +243,17 @@ static inline int kvm_mips_put_one_reg(CPUState *cs, uint64_t reg_id, return kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &cp0reg); } +static inline int kvm_mips_put_one_ureg(CPUState *cs, uint64_t reg_id, + uint32_t *addr) +{ + struct kvm_one_reg cp0reg = { + .id = reg_id, + .addr = (uintptr_t)addr + }; + + return kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &cp0reg); +} + static inline int kvm_mips_put_one_ulreg(CPUState *cs, uint64_t reg_id, target_ulong *addr) { @@ -283,6 +294,17 @@ static inline int kvm_mips_get_one_reg(CPUState *cs, uint64_t reg_id, return ret; } +static inline int kvm_mips_get_one_ureg(CPUState *cs, uint64_t reg_id, + uint32_t *addr) +{ + struct kvm_one_reg cp0reg = { + .id = reg_id, + .addr = (uintptr_t)addr + }; + + return kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &cp0reg); +} + static inline int kvm_mips_get_one_ulreg(CPUState *cs, uint64 reg_id, target_ulong *addr) {