From patchwork Thu Mar 19 10:05:34 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eric Auger X-Patchwork-Id: 451827 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id E21981400B7 for ; Thu, 19 Mar 2015 21:08:36 +1100 (AEDT) Received: from localhost ([::1]:38134 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YYXNT-0005eE-15 for incoming@patchwork.ozlabs.org; Thu, 19 Mar 2015 06:08:35 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48095) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YYXKv-0000ax-L6 for qemu-devel@nongnu.org; Thu, 19 Mar 2015 06:05:58 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YYXKq-0001HY-FO for qemu-devel@nongnu.org; Thu, 19 Mar 2015 06:05:57 -0400 Received: from mail-we0-f182.google.com ([74.125.82.182]:33406) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YYXKq-0001HP-6B for qemu-devel@nongnu.org; Thu, 19 Mar 2015 06:05:52 -0400 Received: by weop45 with SMTP id p45so53035318weo.0 for ; Thu, 19 Mar 2015 03:05:51 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=j15yZBDc2yRLglFdLtRBFAnDqKkKEX8Ll2ia5UoyPao=; b=Zt4yB1krmkK8owcuKsNiyEANOWAKob0Zn/66QXecHAb7Ghx6j/s6iBGXAvWvzWr6/r OufDNLzvNhQhC83BngNgCVZ4ZlOSUh5IyZ1a06mvakCAAlfnVHV1qn2yVGnkO5gYOUvp OubDbOdhjgzy+PKw5NXtDmRxnNDbX0PMHv2oh3qkOwmlx3RJYdBYnFUogr2yKM7dNbtz nN6pSMHVG0oXXfXkuOr9x8Ec1r7P2Uf0SPzu+NxUKafUexRttEhZ5gXK/spzshx/Ql1M GkUpgXpcI5y1VjAS5T01a5EJlwGKrnHcZcM4ccB3W5nFKu3LBXSHaArMOH5bN4hQPF+3 Ivkg== X-Gm-Message-State: ALoCoQkTy6Yvv8aaq8Vzyi5wS4rDDCN+T0ARBEeTQEKGnoTKsveAmsJeA7MhdlCJ6Gv3E22iVsom X-Received: by 10.180.75.140 with SMTP id c12mr14936732wiw.14.1426759551717; Thu, 19 Mar 2015 03:05:51 -0700 (PDT) Received: from midway01-04-00.lavalab ([81.128.185.50]) by mx.google.com with ESMTPSA id y14sm1257677wjr.39.2015.03.19.03.05.50 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 19 Mar 2015 03:05:51 -0700 (PDT) From: Eric Auger To: eric.auger@st.com, eric.auger@linaro.org, qemu-devel@nongnu.org, alex.williamson@redhat.com, peter.maydell@linaro.org, agraf@suse.de, b.reynal@virtualopensystems.com Date: Thu, 19 Mar 2015 10:05:34 +0000 Message-Id: <1426759538-18030-6-git-send-email-eric.auger@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1426759538-18030-1-git-send-email-eric.auger@linaro.org> References: <1426759538-18030-1-git-send-email-eric.auger@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 74.125.82.182 Cc: kim.phillips@freescale.com, patches@linaro.org, a.rigo@virtualopensystems.com, pbonzini@redhat.com, kvmarm@lists.cs.columbia.edu, christoffer.dall@linaro.org Subject: [Qemu-devel] [PATCH v11 5/9] hw/arm/virt: start VFIO IRQ propagation X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Although the dynamic instantiation of VFIO QEMU devices already is possible, VFIO IRQ signaling is not yet started. This patch enables IRQ forwarding by registering a reset notifier that kick off VFIO signaling for all VFIO devices. Such mechanism is requested because the VFIO IRQ binding is handled in a machine init done notifier and only at that time the aboslute GSI number the physical IRQ is forwarded to is known. Signed-off-by: Eric Auger v10 - v11: - becomes a separate patch --- hw/arm/virt.c | 34 ++++++++++++++++++++-------------- 1 file changed, 20 insertions(+), 14 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 439739d..820b09d 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -45,6 +45,7 @@ #include "hw/pci-host/gpex.h" #include "hw/arm/sysbus-fdt.h" #include "hw/platform-bus.h" +#include "hw/vfio/vfio-platform.h" #define NUM_VIRTIO_TRANSPORTS 32 @@ -354,10 +355,10 @@ static uint32_t fdt_add_gic_node(const VirtBoardInfo *vbi) return gic_phandle; } -static uint32_t create_gic(const VirtBoardInfo *vbi, qemu_irq *pic) +static uint32_t create_gic(const VirtBoardInfo *vbi, qemu_irq *pic, + DeviceState **gicdev) { /* We create a standalone GIC v2 */ - DeviceState *gicdev; SysBusDevice *gicbusdev; const char *gictype = "arm_gic"; int i; @@ -366,15 +367,15 @@ static uint32_t create_gic(const VirtBoardInfo *vbi, qemu_irq *pic) gictype = "kvm-arm-gic"; } - gicdev = qdev_create(NULL, gictype); - qdev_prop_set_uint32(gicdev, "revision", 2); - qdev_prop_set_uint32(gicdev, "num-cpu", smp_cpus); + *gicdev = qdev_create(NULL, gictype); + qdev_prop_set_uint32(*gicdev, "revision", 2); + qdev_prop_set_uint32(*gicdev, "num-cpu", smp_cpus); /* Note that the num-irq property counts both internal and external * interrupts; there are always 32 of the former (mandated by GIC spec). */ - qdev_prop_set_uint32(gicdev, "num-irq", NUM_IRQS + 32); - qdev_init_nofail(gicdev); - gicbusdev = SYS_BUS_DEVICE(gicdev); + qdev_prop_set_uint32(*gicdev, "num-irq", NUM_IRQS + 32); + qdev_init_nofail(*gicdev); + gicbusdev = SYS_BUS_DEVICE(*gicdev); sysbus_mmio_map(gicbusdev, 0, vbi->memmap[VIRT_GIC_DIST].base); sysbus_mmio_map(gicbusdev, 1, vbi->memmap[VIRT_GIC_CPU].base); @@ -389,16 +390,16 @@ static uint32_t create_gic(const VirtBoardInfo *vbi, qemu_irq *pic) * since a real A15 always has TrustZone but QEMU doesn't. */ qdev_connect_gpio_out(cpudev, 0, - qdev_get_gpio_in(gicdev, ppibase + 30)); + qdev_get_gpio_in(*gicdev, ppibase + 30)); /* virtual timer */ qdev_connect_gpio_out(cpudev, 1, - qdev_get_gpio_in(gicdev, ppibase + 27)); + qdev_get_gpio_in(*gicdev, ppibase + 27)); sysbus_connect_irq(gicbusdev, i, qdev_get_gpio_in(cpudev, ARM_CPU_IRQ)); } for (i = 0; i < NUM_IRQS; i++) { - pic[i] = qdev_get_gpio_in(gicdev, i); + pic[i] = qdev_get_gpio_in(*gicdev, i); } return fdt_add_gic_node(vbi); @@ -719,7 +720,8 @@ static void create_pcie(const VirtBoardInfo *vbi, qemu_irq *pic, g_free(nodename); } -static void create_platform_bus(VirtBoardInfo *vbi, qemu_irq *pic) +static void create_platform_bus(VirtBoardInfo *vbi, qemu_irq *pic, + DeviceState *gic) { DeviceState *dev; SysBusDevice *s; @@ -758,6 +760,9 @@ static void create_platform_bus(VirtBoardInfo *vbi, qemu_irq *pic) memory_region_add_subregion(sysmem, platform_bus_params.platform_bus_base, sysbus_mmio_get_region(s, 0)); + + /* setup VFIO signaling/IRQFD for all VFIO platform sysbus devices */ + qemu_register_reset(vfio_kick_irqs, gic); } static void *machvirt_dtb(const struct arm_boot_info *binfo, int *fdt_size) @@ -779,6 +784,7 @@ static void machvirt_init(MachineState *machine) VirtBoardInfo *vbi; uint32_t gic_phandle; char **cpustr; + DeviceState *gicdev; if (!cpu_model) { cpu_model = "cortex-a15"; @@ -855,7 +861,7 @@ static void machvirt_init(MachineState *machine) create_flash(vbi); - gic_phandle = create_gic(vbi, pic); + gic_phandle = create_gic(vbi, pic, &gicdev); create_uart(vbi, pic); @@ -888,7 +894,7 @@ static void machvirt_init(MachineState *machine) * another notifier is registered which adds platform bus nodes. * Notifiers are executed in registration reverse order. */ - create_platform_bus(vbi, pic); + create_platform_bus(vbi, pic, gicdev); } static bool virt_get_secure(Object *obj, Error **errp)