From patchwork Tue Jan 13 03:34:38 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Snow X-Patchwork-Id: 428241 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3945B14010F for ; Tue, 13 Jan 2015 14:41:07 +1100 (AEDT) Received: from localhost ([::1]:37247 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YAsLp-0008BY-BC for incoming@patchwork.ozlabs.org; Mon, 12 Jan 2015 22:41:05 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41966) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YAsGT-00080w-Fj for qemu-devel@nongnu.org; Mon, 12 Jan 2015 22:35:34 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YAsGO-0004y4-G1 for qemu-devel@nongnu.org; Mon, 12 Jan 2015 22:35:33 -0500 Received: from mx1.redhat.com ([209.132.183.28]:52395) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YAsGO-0004xx-03 for qemu-devel@nongnu.org; Mon, 12 Jan 2015 22:35:28 -0500 Received: from int-mx11.intmail.prod.int.phx2.redhat.com (int-mx11.intmail.prod.int.phx2.redhat.com [10.5.11.24]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id t0D3ZQrX022935 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 12 Jan 2015 22:35:26 -0500 Received: from scv.usersys.redhat.com (vpn-56-104.rdu2.redhat.com [10.10.56.104]) by int-mx11.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id t0D3YxBl003382; Mon, 12 Jan 2015 22:35:24 -0500 From: John Snow To: qemu-devel@nongnu.org Date: Mon, 12 Jan 2015 22:34:38 -0500 Message-Id: <1421120079-987-14-git-send-email-jsnow@redhat.com> In-Reply-To: <1421120079-987-1-git-send-email-jsnow@redhat.com> References: <1421120079-987-1-git-send-email-jsnow@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.24 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 209.132.183.28 Cc: kwolf@redhat.com, marc.mari.barcelo@gmail.com, armbru@redhat.com, mreitz@redhat.com, stefanha@redhat.com, John Snow Subject: [Qemu-devel] [PATCH 13/14] qtest/ahci: Bookmark FB and CLB pointers X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Instead of re-querying the AHCI device for the FB and CLB buffers, save the pointer we gave to the device during initialization and reference these values instead. Signed-off-by: John Snow Reviewed-by: Paolo Bonzini --- tests/ahci-test.c | 42 ++++++++++++++++++++---------------------- tests/libqos/ahci.h | 6 ++++++ 2 files changed, 26 insertions(+), 22 deletions(-) diff --git a/tests/ahci-test.c b/tests/ahci-test.c index 0bf572e..4a723c0 100644 --- a/tests/ahci-test.c +++ b/tests/ahci-test.c @@ -206,7 +206,7 @@ static void ahci_hba_enable(AHCIQState *ahci) * PxCMD.FR "FIS Receive Running" * PxCMD.CR "Command List Running" */ - uint32_t reg, ports_impl, clb, fb; + uint32_t reg, ports_impl; uint16_t i; uint8_t num_cmd_slots; @@ -255,16 +255,20 @@ static void ahci_hba_enable(AHCIQState *ahci) /* Allocate Memory for the Command List Buffer & FIS Buffer */ /* PxCLB space ... 0x20 per command, as in 4.2.2 p 36 */ - clb = ahci_alloc(ahci, num_cmd_slots * 0x20); - g_test_message("CLB: 0x%08x", clb); - ahci_px_wreg(ahci, i, AHCI_PX_CLB, clb); - g_assert_cmphex(clb, ==, ahci_px_rreg(ahci, i, AHCI_PX_CLB)); + ahci->port[i].clb = ahci_alloc(ahci, num_cmd_slots * 0x20); + qmemset(ahci->port[i].clb, 0x00, 0x100); + g_test_message("CLB: 0x%08lx", ahci->port[i].clb); + ahci_px_wreg(ahci, i, AHCI_PX_CLB, ahci->port[i].clb); + g_assert_cmphex(ahci->port[i].clb, ==, + ahci_px_rreg(ahci, i, AHCI_PX_CLB)); /* PxFB space ... 0x100, as in 4.2.1 p 35 */ - fb = ahci_alloc(ahci, 0x100); - g_test_message("FB: 0x%08x", fb); - ahci_px_wreg(ahci, i, AHCI_PX_FB, fb); - g_assert_cmphex(fb, ==, ahci_px_rreg(ahci, i, AHCI_PX_FB)); + ahci->port[i].fb = ahci_alloc(ahci, 0x100); + qmemset(ahci->port[i].fb, 0x00, 0x100); + g_test_message("FB: 0x%08lx", ahci->port[i].fb); + ahci_px_wreg(ahci, i, AHCI_PX_FB, ahci->port[i].fb); + g_assert_cmphex(ahci->port[i].fb, ==, + ahci_px_rreg(ahci, i, AHCI_PX_FB)); /* Clear PxSERR, PxIS, then IS.IPS[x] by writing '1's. */ ahci_px_wreg(ahci, i, AHCI_PX_SERR, 0xFFFFFFFF); @@ -883,7 +887,7 @@ static void ahci_test_identify(AHCIQState *ahci) RegH2DFIS fis; AHCICommand cmd; PRD prd; - uint32_t ports, reg, clb, table, fb, data_ptr; + uint32_t ports, reg, table, data_ptr; uint16_t buff[256]; unsigned i; int rc; @@ -929,9 +933,7 @@ static void ahci_test_identify(AHCIQState *ahci) g_assert_cmphex(ahci_px_rreg(ahci, i, AHCI_PX_IS), ==, 0); /* Wipe the FIS-Recieve Buffer */ - fb = ahci_px_rreg(ahci, i, AHCI_PX_FB); - g_assert_cmphex(fb, !=, 0); - qmemset(fb, 0x00, 0x100); + qmemset(ahci->port[i].fb, 0x00, 0x100); /* Create a Command Table buffer. 0x80 is the smallest with a PRDTL of 0. */ /* We need at least one PRD, so round up to the nearest 0x80 multiple. */ @@ -943,13 +945,9 @@ static void ahci_test_identify(AHCIQState *ahci) data_ptr = ahci_alloc(ahci, 512); g_assert(data_ptr); - /* Grab the Command List Buffer pointer */ - clb = ahci_px_rreg(ahci, i, AHCI_PX_CLB); - g_assert(clb); - /* Copy the existing Command #0 structure from the CLB into local memory, * and build a new command #0. */ - memread(clb, &cmd, sizeof(cmd)); + memread(ahci->port[i].clb, &cmd, sizeof(cmd)); cmd.b1 = 5; /* reg_h2d_fis is 5 double-words long */ cmd.b2 = 0x04; /* clear PxTFD.STS.BSY when done */ cmd.prdtl = cpu_to_le16(1); /* One PRD table entry. */ @@ -981,7 +979,7 @@ static void ahci_test_identify(AHCIQState *ahci) memwrite(table + 0x80, &prd, sizeof(prd)); /* Commit Command #0, pointing to the Table, to the Command List Buffer. */ - memwrite(clb, &cmd, sizeof(cmd)); + memwrite(ahci->port[i].clb, &cmd, sizeof(cmd)); /* Everything is in place, but we haven't given the go-ahead yet. */ g_assert_cmphex(ahci_px_rreg(ahci, i, AHCI_PX_IS), ==, 0); @@ -1012,12 +1010,12 @@ static void ahci_test_identify(AHCIQState *ahci) ASSERT_BIT_CLEAR(reg, AHCI_PX_TFD_ERR); /* Investigate CMD #0, assert that we read 512 bytes */ - memread(clb, &cmd, sizeof(cmd)); + memread(ahci->port[i].clb, &cmd, sizeof(cmd)); g_assert_cmphex(512, ==, le32_to_cpu(cmd.prdbc)); /* Investigate FIS responses */ - memread(fb + 0x20, pio, 0x20); - memread(fb + 0x40, d2h, 0x20); + memread(ahci->port[i].fb + 0x20, pio, 0x20); + memread(ahci->port[i].fb + 0x40, d2h, 0x20); g_assert_cmphex(pio->fis_type, ==, 0x5f); g_assert_cmphex(d2h->fis_type, ==, 0x34); g_assert_cmphex(pio->flags, ==, d2h->flags); diff --git a/tests/libqos/ahci.h b/tests/libqos/ahci.h index 56b1dfc..f4fc52b 100644 --- a/tests/libqos/ahci.h +++ b/tests/libqos/ahci.h @@ -245,6 +245,11 @@ /*** Structures ***/ +typedef struct AHCIPortQState { + uint64_t fb; + uint64_t clb; +} AHCIPortQState; + typedef struct AHCIQState { QOSState *parent; QPCIDevice *dev; @@ -253,6 +258,7 @@ typedef struct AHCIQState { uint32_t fingerprint; uint32_t cap; uint32_t cap2; + AHCIPortQState port[32]; } AHCIQState; /**