From patchwork Wed Dec 10 11:36:26 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bastian Koppelmann X-Patchwork-Id: 419592 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id D47E11400A0 for ; Wed, 10 Dec 2014 22:15:42 +1100 (AEDT) Received: from localhost ([::1]:44825 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XyfF6-00023g-Oq for incoming@patchwork.ozlabs.org; Wed, 10 Dec 2014 06:15:40 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59916) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XyedO-0002W1-RF for qemu-devel@nongnu.org; Wed, 10 Dec 2014 05:36:48 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XyedI-0000KP-7f for qemu-devel@nongnu.org; Wed, 10 Dec 2014 05:36:42 -0500 Received: from mail.uni-paderborn.de ([131.234.142.9]:35760) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XyedI-0000IR-1O for qemu-devel@nongnu.org; Wed, 10 Dec 2014 05:36:36 -0500 From: Bastian Koppelmann To: qemu-devel@nongnu.org Date: Wed, 10 Dec 2014 11:36:26 +0000 Message-Id: <1418211392-21440-4-git-send-email-kbastian@mail.uni-paderborn.de> X-Mailer: git-send-email 2.1.3 In-Reply-To: <1418211392-21440-1-git-send-email-kbastian@mail.uni-paderborn.de> References: <1418211392-21440-1-git-send-email-kbastian@mail.uni-paderborn.de> X-IMT-Spam-Score: 0.0 () X-PMX-Version: 6.2.0.2453472, Antispam-Engine: 2.7.2.2107409, Antispam-Data: 2014.12.10.103035 X-IMT-Authenticated-Sender: uid=kbastian,ou=People,o=upb,c=de X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 131.234.142.9 Cc: peter.maydell@linaro.org, rth@twiddle.net Subject: [Qemu-devel] [PULL 3/9] target-tricore: Add instructions of BRN opcode format X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Add instructions of BRN opcode format. Add MASK_OP_BRN_DISP15_SEXT. Signed-off-by: Bastian Koppelmann Reviewed-by: Richard Henderson --- target-tricore/translate.c | 26 ++++++++++++++++++++++++++ target-tricore/tricore-opcodes.h | 1 + 2 files changed, 27 insertions(+) diff --git a/target-tricore/translate.c b/target-tricore/translate.c index 789f005..428a41e 100644 --- a/target-tricore/translate.c +++ b/target-tricore/translate.c @@ -568,6 +568,7 @@ static void gen_compute_branch(DisasContext *ctx, uint32_t opc, int r1, int r2 , int32_t constant , int32_t offset) { TCGv temp; + int n; switch (opc) { /* SB-format jumps */ @@ -706,6 +707,20 @@ static void gen_compute_branch(DisasContext *ctx, uint32_t opc, int r1, } tcg_temp_free(temp); break; +/* BRN format */ + case OPCM_32_BRN_JTT: + n = MASK_OP_BRN_N(ctx->opcode); + + temp = tcg_temp_new(); + tcg_gen_andi_tl(temp, cpu_gpr_d[r1], (1 << n)); + + if (MASK_OP_BRN_OP2(ctx->opcode) == OPC2_32_BRN_JNZ_T) { + gen_branch_condi(ctx, TCG_COND_NE, temp, 0, offset); + } else { + gen_branch_condi(ctx, TCG_COND_EQ, temp, 0, offset); + } + tcg_temp_free(temp); + break; default: printf("Branch Error at %x\n", ctx->pc); } @@ -2371,6 +2386,11 @@ static void decode_32Bit_opc(CPUTriCoreState *env, DisasContext *ctx) op1 = MASK_OP_MAJOR(ctx->opcode); + /* handle JNZ.T opcode only being 6 bit long */ + if (unlikely((op1 & 0x3f) == OPCM_32_BRN_JTT)) { + op1 = OPCM_32_BRN_JTT; + } + switch (op1) { /* ABS-format */ case OPCM_32_ABS_LDW: @@ -2504,6 +2524,12 @@ static void decode_32Bit_opc(CPUTriCoreState *env, DisasContext *ctx) r1 = MASK_OP_BRC_S1(ctx->opcode); gen_compute_branch(ctx, op1, r1, 0, const4, address); break; +/* BRN Format */ + case OPCM_32_BRN_JTT: + address = MASK_OP_BRN_DISP15_SEXT(ctx->opcode); + r1 = MASK_OP_BRN_S1(ctx->opcode); + gen_compute_branch(ctx, op1, r1, 0, 0, address); + break; } } diff --git a/target-tricore/tricore-opcodes.h b/target-tricore/tricore-opcodes.h index 2d18624..3622d38 100644 --- a/target-tricore/tricore-opcodes.h +++ b/target-tricore/tricore-opcodes.h @@ -132,6 +132,7 @@ /* BRN Format */ #define MASK_OP_BRN_OP2(op) MASK_BITS_SHIFT(op, 31, 31) #define MASK_OP_BRN_DISP15(op) MASK_BITS_SHIFT(op, 16, 30) +#define MASK_OP_BRN_DISP15_SEXT(op) MASK_BITS_SHIFT_SEXT(op, 16, 30) #define MASK_OP_BRN_N(op) (MASK_BITS_SHIFT(op, 12, 15) + \ (MASK_BITS_SHIFT(op, 7, 7) << 4)) #define MASK_OP_BRN_S1(op) MASK_BITS_SHIFT(op, 8, 11)