From patchwork Tue Dec 9 01:13:00 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laszlo Ersek X-Patchwork-Id: 418922 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 62E8A1400DE for ; Tue, 9 Dec 2014 12:16:21 +1100 (AEDT) Received: from localhost ([::1]:37013 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Xy9PX-0003sQ-7r for incoming@patchwork.ozlabs.org; Mon, 08 Dec 2014 20:16:19 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37935) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Xy9Mm-0007yF-Ia for qemu-devel@nongnu.org; Mon, 08 Dec 2014 20:13:37 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Xy9Mg-0006qY-DF for qemu-devel@nongnu.org; Mon, 08 Dec 2014 20:13:28 -0500 Received: from mx1.redhat.com ([209.132.183.28]:51539) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Xy9Mg-0006pp-64 for qemu-devel@nongnu.org; Mon, 08 Dec 2014 20:13:22 -0500 Received: from int-mx09.intmail.prod.int.phx2.redhat.com (int-mx09.intmail.prod.int.phx2.redhat.com [10.5.11.22]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id sB91DJSQ008323 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 8 Dec 2014 20:13:20 -0500 Received: from lacos-laptop-7.usersys.redhat.com (ovpn-116-21.ams2.redhat.com [10.36.116.21]) by int-mx09.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id sB91D9GH004767; Mon, 8 Dec 2014 20:13:17 -0500 From: Laszlo Ersek To: peter.maydell@linaro.org, qemu-devel@nongnu.org, rjones@redhat.com, drjones@redhat.com, lersek@redhat.com Date: Tue, 9 Dec 2014 02:13:00 +0100 Message-Id: <1418087585-27601-3-git-send-email-lersek@redhat.com> In-Reply-To: <1418087585-27601-1-git-send-email-lersek@redhat.com> References: <1418087585-27601-1-git-send-email-lersek@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.22 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 2/7] fw_cfg: introduce the "data_memwidth" property X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The "data_memwidth" property is capable of changing the maximum valid access size to the MMIO data register, and (corresponding to the previous patch) resizes the memory region similarly, at device realization time. (Because "data_iomem" is configured and installed dynamically now, we must delay those steps to the realize callback.) The default value of "data_memwidth" is set so that we don't yet diverge from "fw_cfg_data_mem_ops". Most of the fw_cfg users will stick with the default, and for them we should continue using the statically allocated "fw_cfg_data_mem_ops". This is beneficial for debugging because gdb can resolve pointers referencing static objects to the names of those objects. Signed-off-by: Laszlo Ersek --- Notes: v3: - new in v3 [Drew Jones] hw/nvram/fw_cfg.c | 19 +++++++++++++++---- 1 file changed, 15 insertions(+), 4 deletions(-) diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c index 23ea0fe..6073f16 100644 --- a/hw/nvram/fw_cfg.c +++ b/hw/nvram/fw_cfg.c @@ -50,8 +50,9 @@ struct FWCfgState { /*< public >*/ MemoryRegion ctl_iomem, data_iomem, comb_iomem; uint32_t ctl_iobase, data_iobase; + uint32_t data_memwidth; FWCfgEntry entries[2][FW_CFG_MAX_ENTRY]; FWCfgFiles *files; uint16_t cur_entry; uint32_t cur_offset; @@ -569,8 +570,10 @@ FWCfgState *fw_cfg_init(uint32_t ctl_port, uint32_t data_port, dev = qdev_create(NULL, TYPE_FW_CFG); qdev_prop_set_uint32(dev, "ctl_iobase", ctl_port); qdev_prop_set_uint32(dev, "data_iobase", data_port); + qdev_prop_set_uint32(dev, "data_memwidth", + fw_cfg_data_mem_ops.valid.max_access_size); d = SYS_BUS_DEVICE(dev); s = FW_CFG(dev); @@ -607,12 +610,8 @@ static void fw_cfg_initfn(Object *obj) memory_region_init_io(&s->ctl_iomem, OBJECT(s), &fw_cfg_ctl_mem_ops, s, "fwcfg.ctl", FW_CFG_SIZE); sysbus_init_mmio(sbd, &s->ctl_iomem); - memory_region_init_io(&s->data_iomem, OBJECT(s), &fw_cfg_data_mem_ops, s, - "fwcfg.data", - fw_cfg_data_mem_ops.valid.max_access_size); - sysbus_init_mmio(sbd, &s->data_iomem); /* In case ctl and data overlap: */ memory_region_init_io(&s->comb_iomem, OBJECT(s), &fw_cfg_comb_mem_ops, s, "fwcfg", FW_CFG_SIZE); } @@ -620,9 +619,20 @@ static void fw_cfg_initfn(Object *obj) static void fw_cfg_realize(DeviceState *dev, Error **errp) { FWCfgState *s = FW_CFG(dev); SysBusDevice *sbd = SYS_BUS_DEVICE(dev); + const MemoryRegionOps *data_mem_ops = &fw_cfg_data_mem_ops; + if (s->data_memwidth > data_mem_ops->valid.max_access_size) { + MemoryRegionOps *ops; + + ops = g_memdup(data_mem_ops, sizeof(*data_mem_ops)); + ops->valid.max_access_size = s->data_memwidth; + data_mem_ops = ops; + } + memory_region_init_io(&s->data_iomem, OBJECT(s), data_mem_ops, s, + "fwcfg.data", data_mem_ops->valid.max_access_size); + sysbus_init_mmio(sbd, &s->data_iomem); if (s->ctl_iobase + 1 == s->data_iobase) { sysbus_add_io(sbd, s->ctl_iobase, &s->comb_iomem); } else { @@ -637,8 +647,9 @@ static void fw_cfg_realize(DeviceState *dev, Error **errp) static Property fw_cfg_properties[] = { DEFINE_PROP_UINT32("ctl_iobase", FWCfgState, ctl_iobase, -1), DEFINE_PROP_UINT32("data_iobase", FWCfgState, data_iobase, -1), + DEFINE_PROP_UINT32("data_memwidth", FWCfgState, data_memwidth, -1), DEFINE_PROP_END_OF_LIST(), }; FWCfgState *fw_cfg_find(void)