From patchwork Tue Dec 9 01:12:59 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laszlo Ersek X-Patchwork-Id: 418919 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44E731400D2 for ; Tue, 9 Dec 2014 12:14:09 +1100 (AEDT) Received: from localhost ([::1]:36995 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Xy9NP-0000W9-8x for incoming@patchwork.ozlabs.org; Mon, 08 Dec 2014 20:14:07 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37924) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Xy9Mk-0007xD-9N for qemu-devel@nongnu.org; Mon, 08 Dec 2014 20:13:32 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Xy9Md-0006kl-CD for qemu-devel@nongnu.org; Mon, 08 Dec 2014 20:13:25 -0500 Received: from mx1.redhat.com ([209.132.183.28]:45142) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Xy9Md-0006jo-2m for qemu-devel@nongnu.org; Mon, 08 Dec 2014 20:13:19 -0500 Received: from int-mx09.intmail.prod.int.phx2.redhat.com (int-mx09.intmail.prod.int.phx2.redhat.com [10.5.11.22]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id sB91DGa8009376 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 8 Dec 2014 20:13:16 -0500 Received: from lacos-laptop-7.usersys.redhat.com (ovpn-116-21.ams2.redhat.com [10.36.116.21]) by int-mx09.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id sB91D9GG004767; Mon, 8 Dec 2014 20:13:14 -0500 From: Laszlo Ersek To: peter.maydell@linaro.org, qemu-devel@nongnu.org, rjones@redhat.com, drjones@redhat.com, lersek@redhat.com Date: Tue, 9 Dec 2014 02:12:59 +0100 Message-Id: <1418087585-27601-2-git-send-email-lersek@redhat.com> In-Reply-To: <1418087585-27601-1-git-send-email-lersek@redhat.com> References: <1418087585-27601-1-git-send-email-lersek@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.22 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 1/7] fw_cfg: max access size and region size are the same for MMIO data reg X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Make it clear that the maximum access size to the MMIO data register determines the full size of the memory region. Currently the max access size is 1. Ensure that if a larger size were used in "fw_cfg_data_mem_ops.valid.max_access_size", the memory subsystem would split the access to byte-sized accesses internally, in increasing address order. fw_cfg_data_mem_read() and fw_cfg_data_mem_write() don't care about "address" or "size"; they just call the sequential fw_cfg_read() and fw_cfg_write() functions, correspondingly. Therefore the automatic splitting is just right. (The endianness of "fw_cfg_data_mem_ops" is native.) This patch doesn't change behavior. Signed-off-by: Laszlo Ersek --- Notes: v3: - new in v3 [Drew Jones] hw/nvram/fw_cfg.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c index a7122ee..23ea0fe 100644 --- a/hw/nvram/fw_cfg.c +++ b/hw/nvram/fw_cfg.c @@ -30,9 +30,8 @@ #include "qemu/error-report.h" #include "qemu/config-file.h" #define FW_CFG_SIZE 2 -#define FW_CFG_DATA_SIZE 1 #define TYPE_FW_CFG "fw_cfg" #define FW_CFG_NAME "fw_cfg" #define FW_CFG_PATH "/machine/" FW_CFG_NAME #define FW_CFG(obj) OBJECT_CHECK(FWCfgState, (obj), TYPE_FW_CFG) @@ -323,8 +322,9 @@ static const MemoryRegionOps fw_cfg_data_mem_ops = { .valid = { .min_access_size = 1, .max_access_size = 1, }, + .impl.max_access_size = 1, }; static const MemoryRegionOps fw_cfg_comb_mem_ops = { .read = fw_cfg_comb_read, @@ -608,9 +608,10 @@ static void fw_cfg_initfn(Object *obj) memory_region_init_io(&s->ctl_iomem, OBJECT(s), &fw_cfg_ctl_mem_ops, s, "fwcfg.ctl", FW_CFG_SIZE); sysbus_init_mmio(sbd, &s->ctl_iomem); memory_region_init_io(&s->data_iomem, OBJECT(s), &fw_cfg_data_mem_ops, s, - "fwcfg.data", FW_CFG_DATA_SIZE); + "fwcfg.data", + fw_cfg_data_mem_ops.valid.max_access_size); sysbus_init_mmio(sbd, &s->data_iomem); /* In case ctl and data overlap: */ memory_region_init_io(&s->comb_iomem, OBJECT(s), &fw_cfg_comb_mem_ops, s, "fwcfg", FW_CFG_SIZE);