From patchwork Tue Sep 23 09:04:50 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Antony Pavlov X-Patchwork-Id: 392280 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 5F0091400A8 for ; Tue, 23 Sep 2014 19:05:56 +1000 (EST) Received: from localhost ([::1]:51628 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XWM2k-0005kx-9d for incoming@patchwork.ozlabs.org; Tue, 23 Sep 2014 05:05:54 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55086) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XWM23-00059W-CH for qemu-devel@nongnu.org; Tue, 23 Sep 2014 05:05:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XWM1u-0003Is-Az for qemu-devel@nongnu.org; Tue, 23 Sep 2014 05:05:11 -0400 Received: from mail-la0-x232.google.com ([2a00:1450:4010:c03::232]:48465) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XWM1u-0003AO-34 for qemu-devel@nongnu.org; Tue, 23 Sep 2014 05:05:02 -0400 Received: by mail-la0-f50.google.com with SMTP id ty20so8419292lab.9 for ; Tue, 23 Sep 2014 02:04:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=utu9P814cDcS4pOAId70oO+7c+aTAfyhvdHtjnx5cN4=; b=PcTHsuvgmqQBYQxkHo4LLilGL7Ua4yPF4dSYqxvG9rmgI976RxVQWqTDkq0agM8xIS PN9E8fhleK1HXzWOgpM6N1zmoFgjLceV3C5cCay5aPiYSfvcc6L92kSh04PG8ahtP8tv NmbjTxldtovVPPdudv0Vji332v+Mkbl+zlecdk762aTS7F08TdBD0bHxfpvtqc3dNocy 3uMqYxcsBaZBLuUFd+9qpgIi0XSpgu8c5IpFyDovBw25b/5ri/0p9MU6MIHPCvKX9EcI 2Sfq87R5PyuJdZlS1TU3+xWOkR/b0VmKhANk3snmPplcPoDGP/T1RMxe4KqrjDmWE152 seLQ== X-Received: by 10.152.36.4 with SMTP id m4mr31131660laj.17.1411463095852; Tue, 23 Sep 2014 02:04:55 -0700 (PDT) Received: from doce.NIISI (ppp91-79-44-59.pppoe.mtu-net.ru. [91.79.44.59]) by mx.google.com with ESMTPSA id y5sm4561639laa.20.2014.09.23.02.04.54 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 23 Sep 2014 02:04:55 -0700 (PDT) From: Antony Pavlov To: qemu-devel@nongnu.org Date: Tue, 23 Sep 2014 13:04:50 +0400 Message-Id: <1411463090-25466-1-git-send-email-antonynpavlov@gmail.com> X-Mailer: git-send-email 2.1.0 X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2a00:1450:4010:c03::232 Cc: Peter Maydell , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Aurelien Jarno , Antony Pavlov Subject: [Qemu-devel] [PATCH] qemu-log: add log category for MIPS MMU fault info X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Running barebox on qemu-system-mips* with '-d unimp' overloads stderr by very very many mips_cpu_handle_mmu_fault() messages: mips_cpu_handle_mmu_fault address=b80003fd ret 0 physical 00000000180003fd prot 3 mips_cpu_handle_mmu_fault address=a0800884 ret 0 physical 0000000000800884 prot 3 mips_cpu_handle_mmu_fault pc a080cd80 ad b80003fd rw 0 mmu_idx 0 So it's very difficult to find LOG_UNIMP message. The mips_cpu_handle_mmu_fault() messages appears on enabling ANY logging! It's not very handy. Adding separate log category for mips_cpu_handle_mmu_fault() logging fixes the problem. Signed-off-by: Antony Pavlov --- include/qemu/log.h | 1 + qemu-log.c | 2 ++ target-mips/helper.c | 6 ++++-- 3 files changed, 7 insertions(+), 2 deletions(-) diff --git a/include/qemu/log.h b/include/qemu/log.h index d515424..195f665 100644 --- a/include/qemu/log.h +++ b/include/qemu/log.h @@ -40,6 +40,7 @@ static inline bool qemu_log_enabled(void) #define CPU_LOG_RESET (1 << 9) #define LOG_UNIMP (1 << 10) #define LOG_GUEST_ERROR (1 << 11) +#define CPU_LOG_MMU (1 << 12) /* Returns true if a bit is set in the current loglevel mask */ diff --git a/qemu-log.c b/qemu-log.c index 797f2af..d27766a 100644 --- a/qemu-log.c +++ b/qemu-log.c @@ -110,6 +110,8 @@ const QEMULogItem qemu_log_items[] = { "x86 only: show protected mode far calls/returns/exceptions" }, { CPU_LOG_RESET, "cpu_reset", "x86 only: show CPU state before CPU resets" }, + { CPU_LOG_MMU, "mmu", + "mips only: show MMU fault handling information" }, { CPU_LOG_IOPORT, "ioport", "show all i/o ports accesses" }, { LOG_UNIMP, "unimp", diff --git a/target-mips/helper.c b/target-mips/helper.c index 8a997e4..cb41061 100644 --- a/target-mips/helper.c +++ b/target-mips/helper.c @@ -309,7 +309,8 @@ int mips_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, #if 0 log_cpu_state(cs, 0); #endif - qemu_log("%s pc " TARGET_FMT_lx " ad %" VADDR_PRIx " rw %d mmu_idx %d\n", + qemu_log_mask(CPU_LOG_MMU, + "%s pc " TARGET_FMT_lx " ad %" VADDR_PRIx " rw %d mmu_idx %d\n", __func__, env->active_tc.PC, address, rw, mmu_idx); rw &= 1; @@ -321,7 +322,8 @@ int mips_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, access_type = ACCESS_INT; ret = get_physical_address(env, &physical, &prot, address, rw, access_type); - qemu_log("%s address=%" VADDR_PRIx " ret %d physical " TARGET_FMT_plx + qemu_log_mask(CPU_LOG_MMU, + "%s address=%" VADDR_PRIx " ret %d physical " TARGET_FMT_plx " prot %d\n", __func__, address, ret, physical, prot); if (ret == TLBRET_MATCH) {