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[129.42.161.36]) by mx.google.com with ESMTPSA id w9sm2061621qad.31.2014.08.25.12.26.26 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 25 Aug 2014 12:26:27 -0700 (PDT) From: Tom Musta To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Date: Mon, 25 Aug 2014 14:25:44 -0500 Message-Id: <1408994744-17312-7-git-send-email-tommusta@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1408994744-17312-1-git-send-email-tommusta@gmail.com> References: <1408994744-17312-1-git-send-email-tommusta@gmail.com> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400d:c04::22b Cc: Tom Musta , agraf@suse.de, rth@twiddle.net Subject: [Qemu-devel] [PATCH 6/6] target-ppc: Implement mulldo with TCG X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Optimize mulldo by using the muls2_i64 operation rather than a helper. Eliminate the obsolete helper code. Signed-off-by: Tom Musta Suggested-by: Richard Henderson --- target-ppc/helper.h | 1 - target-ppc/int_helper.c | 27 --------------------------- target-ppc/translate.c | 16 ++++++++++++++-- 3 files changed, 14 insertions(+), 30 deletions(-) diff --git a/target-ppc/helper.h b/target-ppc/helper.h index 509eae5..0cfdc8a 100644 --- a/target-ppc/helper.h +++ b/target-ppc/helper.h @@ -28,7 +28,6 @@ DEF_HELPER_2(icbi, void, env, tl) DEF_HELPER_5(lscbx, tl, env, tl, i32, i32, i32) #if defined(TARGET_PPC64) -DEF_HELPER_3(mulldo, i64, env, i64, i64) DEF_HELPER_4(divdeu, i64, env, i64, i64, i32) DEF_HELPER_4(divde, i64, env, i64, i64, i32) #endif diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c index e5b103b..713d777 100644 --- a/target-ppc/int_helper.c +++ b/target-ppc/int_helper.c @@ -24,33 +24,6 @@ #include "helper_regs.h" /*****************************************************************************/ /* Fixed point operations helpers */ -#if defined(TARGET_PPC64) - -uint64_t helper_mulldo(CPUPPCState *env, uint64_t arg1, uint64_t arg2) -{ - int64_t th; - uint64_t tl; - - muls64(&tl, (uint64_t *)&th, arg1, arg2); - - /* th should either contain all 1 bits or all 0 bits and should - * match the sign bit of tl; otherwise we have overflowed. */ - - if ((int64_t)tl < 0) { - if (likely(th == -1LL)) { - env->ov = 0; - } else { - env->so = env->ov = 1; - } - } else if (likely(th == 0LL)) { - env->ov = 0; - } else { - env->so = env->ov = 1; - } - - return (int64_t)tl; -} -#endif target_ulong helper_divweu(CPUPPCState *env, target_ulong ra, target_ulong rb, uint32_t oe) diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 1062634..d03daea 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -1215,8 +1215,20 @@ static void gen_mulld(DisasContext *ctx) /* mulldo mulldo. */ static void gen_mulldo(DisasContext *ctx) { - gen_helper_mulldo(cpu_gpr[rD(ctx->opcode)], cpu_env, - cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); + TCGv_i64 t0 = tcg_temp_new_i64(); + TCGv_i64 t1 = tcg_temp_new_i64(); + + tcg_gen_muls2_i64(t0, t1, cpu_gpr[rA(ctx->opcode)], + cpu_gpr[rB(ctx->opcode)]); + tcg_gen_mov_i64(cpu_gpr[rD(ctx->opcode)], t0); + + tcg_gen_sari_i64(t0, t0, 63); + tcg_gen_setcond_i64(TCG_COND_NE, cpu_ov, t0, t1); + tcg_gen_or_tl(cpu_so, cpu_so, cpu_ov); + + tcg_temp_free_i64(t0); + tcg_temp_free_i64(t1); + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); }