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[129.42.161.36]) by mx.google.com with ESMTPSA id te6sm112104092oec.2.2014.03.10.12.05.24 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 10 Mar 2014 12:05:25 -0700 (PDT) From: Tom Musta To: qemu-devel@nongnu.org Date: Mon, 10 Mar 2014 14:05:00 -0500 Message-Id: <1394478302-8474-5-git-send-email-tommusta@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1394478302-8474-1-git-send-email-tommusta@gmail.com> References: <1394478302-8474-1-git-send-email-tommusta@gmail.com> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:4003:c01::22b Cc: Tom Musta , qemu-ppc@nongnu.org Subject: [Qemu-devel] [PATCH 4/6] target-i386: Use Common ShiftRows and InvShiftRows Tables X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This patch eliminates the (now) redundant copy of the Advanced Encryption Standard (AES) ShiftRows and InvShiftRows tables; the code is updated to use the common tables declared in include/qemu/aes.h. Signed-off-by: Tom Musta diff --git a/target-i386/ops_sse.h b/target-i386/ops_sse.h index eb24b5f..886e0a8 100644 --- a/target-i386/ops_sse.h +++ b/target-i386/ops_sse.h @@ -17,6 +17,9 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see . */ + +#include "qemu/aes.h" + #if SHIFT == 0 #define Reg MMXReg #define XMM_ONLY(...) @@ -2204,15 +2207,6 @@ void glue(helper_pclmulqdq, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, d->Q(1) = resh; } -/* AES-NI op helpers */ -static const uint8_t aes_shifts[16] = { - 0, 5, 10, 15, 4, 9, 14, 3, 8, 13, 2, 7, 12, 1, 6, 11 -}; - -static const uint8_t aes_ishifts[16] = { - 0, 13, 10, 7, 4, 1, 14, 11, 8, 5, 2, 15, 12, 9, 6, 3 -}; - void glue(helper_aesdec, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) { int i; @@ -2220,10 +2214,10 @@ void glue(helper_aesdec, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) Reg rk = *s; for (i = 0 ; i < 4 ; i++) { - d->L(i) = rk.L(i) ^ bswap32(AES_Td0[st.B(aes_ishifts[4*i+0])] ^ - AES_Td1[st.B(aes_ishifts[4*i+1])] ^ - AES_Td2[st.B(aes_ishifts[4*i+2])] ^ - AES_Td3[st.B(aes_ishifts[4*i+3])]); + d->L(i) = rk.L(i) ^ bswap32(AES_Td0[st.B(AES_ishifts[4*i+0])] ^ + AES_Td1[st.B(AES_ishifts[4*i+1])] ^ + AES_Td2[st.B(AES_ishifts[4*i+2])] ^ + AES_Td3[st.B(AES_ishifts[4*i+3])]); } } @@ -2234,7 +2228,7 @@ void glue(helper_aesdeclast, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) Reg rk = *s; for (i = 0; i < 16; i++) { - d->B(i) = rk.B(i) ^ (AES_Td4[st.B(aes_ishifts[i])] & 0xff); + d->B(i) = rk.B(i) ^ (AES_Td4[st.B(AES_ishifts[i])] & 0xff); } } @@ -2245,10 +2239,10 @@ void glue(helper_aesenc, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) Reg rk = *s; for (i = 0 ; i < 4 ; i++) { - d->L(i) = rk.L(i) ^ bswap32(AES_Te0[st.B(aes_shifts[4*i+0])] ^ - AES_Te1[st.B(aes_shifts[4*i+1])] ^ - AES_Te2[st.B(aes_shifts[4*i+2])] ^ - AES_Te3[st.B(aes_shifts[4*i+3])]); + d->L(i) = rk.L(i) ^ bswap32(AES_Te0[st.B(AES_shifts[4*i+0])] ^ + AES_Te1[st.B(AES_shifts[4*i+1])] ^ + AES_Te2[st.B(AES_shifts[4*i+2])] ^ + AES_Te3[st.B(AES_shifts[4*i+3])]); } } @@ -2259,7 +2253,7 @@ void glue(helper_aesenclast, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) Reg rk = *s; for (i = 0; i < 16; i++) { - d->B(i) = rk.B(i) ^ (AES_Te4[st.B(aes_shifts[i])] & 0xff); + d->B(i) = rk.B(i) ^ (AES_Te4[st.B(AES_shifts[i])] & 0xff); } }