From patchwork Tue Jan 21 20:12:26 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 313047 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 956CA2C00AC for ; Wed, 22 Jan 2014 07:20:11 +1100 (EST) Received: from localhost ([::1]:60436 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W5hki-0002LQ-0Y for incoming@patchwork.ozlabs.org; Tue, 21 Jan 2014 15:16:52 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51048) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W5hgm-0005BT-0k for qemu-devel@nongnu.org; Tue, 21 Jan 2014 15:12:48 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1W5hgl-0007ci-8V for qemu-devel@nongnu.org; Tue, 21 Jan 2014 15:12:47 -0500 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:44951) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W5hgl-0007WW-1Q for qemu-devel@nongnu.org; Tue, 21 Jan 2014 15:12:47 -0500 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1W5hgV-0003X1-UE; Tue, 21 Jan 2014 20:12:31 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 21 Jan 2014 20:12:26 +0000 Message-Id: <1390335150-13470-21-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1390335150-13470-1-git-send-email-peter.maydell@linaro.org> References: <1390335150-13470-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2001:8b0:1d0::1 Cc: Peter Crosthwaite , patches@linaro.org, Michael Matz , Alexander Graf , Claudio Fontana , Dirk Mueller , Will Newton , Laurent Desnogues , =?UTF-8?q?Alex=20Benn=C3=A9e?= , kvmarm@lists.cs.columbia.edu, Christoffer Dall , Richard Henderson Subject: [Qemu-devel] [PATCH 20/24] target-arm: Implement AArch64 MPIDR X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Implement the AArch64 MPIDR system register. Signed-off-by: Peter Maydell Reviewed-by: Peter Crosthwaite --- target-arm/helper.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 1f1dec1..ef74d10 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -1499,7 +1499,8 @@ static int mpidr_read(CPUARMState *env, const ARMCPRegInfo *ri, { CPUState *cs = CPU(arm_env_get_cpu(env)); uint32_t mpidr = cs->cpu_index; - /* We don't support setting cluster ID ([8..11]) + /* We don't support setting cluster ID ([8..11]) (known as Aff1 + * in later ARM ARM versions), or any of the higher affinity level fields, * so these bits always RAZ. */ if (arm_feature(env, ARM_FEATURE_V7MP)) { @@ -1515,7 +1516,8 @@ static int mpidr_read(CPUARMState *env, const ARMCPRegInfo *ri, } static const ARMCPRegInfo mpidr_cp_reginfo[] = { - { .name = "MPIDR", .cp = 15, .crn = 0, .crm = 0, .opc1 = 0, .opc2 = 5, + { .name = "MPIDR", .state = ARM_CP_STATE_BOTH, + .opc0 = 3, .crn = 0, .crm = 0, .opc1 = 0, .opc2 = 5, .access = PL1_R, .readfn = mpidr_read, .type = ARM_CP_NO_MIGRATE }, REGINFO_SENTINEL };