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[37.190.57.6]) by mx.google.com with ESMTPSA id bl6sm168523lbb.5.2013.12.13.13.35.01 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 13 Dec 2013 13:35:02 -0800 (PST) From: Antony Pavlov To: qemu-devel@nongnu.org Date: Sat, 14 Dec 2013 01:42:11 +0400 Message-Id: <1386970932-4886-6-git-send-email-antonynpavlov@gmail.com> X-Mailer: git-send-email 1.8.5 In-Reply-To: <1386970932-4886-1-git-send-email-antonynpavlov@gmail.com> References: <1386970932-4886-1-git-send-email-antonynpavlov@gmail.com> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2a00:1450:4010:c04::231 Cc: Peter Maydell , Peter Crosthwaite , Giovanni Condello , g3gg0 , Alex Dumitrache , Paul Brook , Paolo Bonzini , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Antony Pavlov Subject: [Qemu-devel] [PATCH v8 5/6] hw/arm/digic: add NOR ROM support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Antony Pavlov --- hw/arm/digic_boards.c | 70 +++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 70 insertions(+) diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c index 87a9c4b..217c506 100644 --- a/hw/arm/digic_boards.c +++ b/hw/arm/digic_boards.c @@ -27,6 +27,13 @@ #include "exec/address-spaces.h" #include "qemu/error-report.h" #include "hw/arm/digic.h" +#include "hw/block/flash.h" +#include "hw/loader.h" +#include "sysemu/sysemu.h" + +#define DIGIC4_ROM0_BASE 0xf0000000 +#define DIGIC4_ROM1_BASE 0xf8000000 +#define DIGIC4_ROM_MAX_SIZE 0x08000000 typedef struct DigicBoardState { DigicState *digic; @@ -35,6 +42,10 @@ typedef struct DigicBoardState { typedef struct DigicBoard { hwaddr ram_size; + void (*add_rom0)(DigicBoardState *, hwaddr, const char *); + const char *rom0_def_filename; + void (*add_rom1)(DigicBoardState *, hwaddr, const char *); + const char *rom1_def_filename; } DigicBoard; static void digic4_board_setup_ram(DigicBoardState *s, hwaddr ram_size) @@ -59,10 +70,69 @@ static void digic4_board_init(DigicBoard *board) } digic4_board_setup_ram(s, board->ram_size); + + if (board->add_rom0) { + board->add_rom0(s, DIGIC4_ROM0_BASE, board->rom0_def_filename); + } + + if (board->add_rom1) { + board->add_rom1(s, DIGIC4_ROM1_BASE, board->rom1_def_filename); + } +} + +static void digic_load_rom(DigicBoardState *s, hwaddr addr, + hwaddr max_size, const char *def_filename) +{ + target_long rom_size; + const char *filename; + + if (bios_name) { + filename = bios_name; + } else { + filename = def_filename; + } + + if (filename) { + char *fn = qemu_find_file(QEMU_FILE_TYPE_BIOS, filename); + + if (!fn) { + error_report("Couldn't find rom image '%s'.\n", filename); + exit(1); + } + + rom_size = load_image_targphys(fn, addr, max_size); + if (rom_size < 0 || rom_size > max_size) { + error_report("Couldn't load rom image '%s'.\n", filename); + exit(1); + } + } +} + +/* + * Samsung K8P3215UQB + * 64M Bit (4Mx16) Page Mode / Multi-Bank NOR Flash Memory + */ +static void digic4_add_k8p3215uqb_rom(DigicBoardState *s, hwaddr addr, + const char *def_filename) +{ +#define FLASH_K8P3215UQB_SIZE (4 * 1024 * 1024) +#define FLASH_K8P3215UQB_SECTOR_SIZE (64 * 1024) + + pflash_cfi02_register(addr, NULL, "pflash", FLASH_K8P3215UQB_SIZE, + NULL, FLASH_K8P3215UQB_SECTOR_SIZE, + FLASH_K8P3215UQB_SIZE / FLASH_K8P3215UQB_SECTOR_SIZE, + DIGIC4_ROM_MAX_SIZE / FLASH_K8P3215UQB_SIZE, + 4, + 0x00EC, 0x007E, 0x0003, 0x0001, + 0x0555, 0x2aa, 0); + + digic_load_rom(s, addr, FLASH_K8P3215UQB_SIZE, def_filename); } static DigicBoard digic4_board_canon_a1100 = { .ram_size = 64 * 1024 * 1024, + .add_rom1 = digic4_add_k8p3215uqb_rom, + .rom1_def_filename = "canon-a1100-rom1.bin", }; static void canon_a1100_init(QEMUMachineInitArgs *args)