From patchwork Wed Dec 4 14:34:15 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Roth X-Patchwork-Id: 296544 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 9E6172C00A8 for ; Thu, 5 Dec 2013 02:03:20 +1100 (EST) Received: from localhost ([::1]:48616 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VoDbZ-00067D-HU for incoming@patchwork.ozlabs.org; Wed, 04 Dec 2013 09:39:09 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55208) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VoDXe-0001hu-8V for qemu-devel@nongnu.org; Wed, 04 Dec 2013 09:35:27 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VoDXS-0002lD-I3 for qemu-devel@nongnu.org; Wed, 04 Dec 2013 09:35:06 -0500 Received: from e9.ny.us.ibm.com ([32.97.182.139]:37204) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VoDXS-0002ks-Du for qemu-devel@nongnu.org; Wed, 04 Dec 2013 09:34:54 -0500 Received: from /spool/local by e9.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Wed, 4 Dec 2013 09:34:53 -0500 Received: from b01cxnp23034.gho.pok.ibm.com (b01cxnp23034.gho.pok.ibm.com [9.57.198.29]) by d01dlp01.pok.ibm.com (Postfix) with ESMTP id BE6D738C8045; Wed, 4 Dec 2013 09:34:50 -0500 (EST) Received: from d01av05.pok.ibm.com (d01av05.pok.ibm.com [9.56.224.195]) by b01cxnp23034.gho.pok.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id rB4EYqeA9830756; Wed, 4 Dec 2013 14:34:52 GMT Received: from d01av05.pok.ibm.com (localhost [127.0.0.1]) by d01av05.pok.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id rB4EYqKF007696; Wed, 4 Dec 2013 09:34:52 -0500 Received: from localhost ([9.41.105.190]) by d01av05.pok.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id rB4EYpZm007689; Wed, 4 Dec 2013 09:34:52 -0500 From: Michael Roth To: qemu-devel@nongnu.org Date: Wed, 4 Dec 2013 08:34:15 -0600 Message-Id: <1386167679-13021-9-git-send-email-mdroth@linux.vnet.ibm.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1386167679-13021-1-git-send-email-mdroth@linux.vnet.ibm.com> References: <1386167679-13021-1-git-send-email-mdroth@linux.vnet.ibm.com> X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 13120414-7182-0000-0000-000009444988 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x-2.6.x [generic] X-Received-From: 32.97.182.139 Cc: qemu-stable@nongnu.org Subject: [Qemu-devel] [PATCH 08/32] misc: Use new rotate functions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Stefan Weil Signed-off-by: Stefan Weil (cherry picked from commit 3df2b8fde949be86d8a78923c992fdd698d4ea4c) Signed-off-by: Michael Roth --- target-arm/iwmmxt_helper.c | 2 +- tcg/optimize.c | 12 ++++-------- tci.c | 8 ++++---- 3 files changed, 9 insertions(+), 13 deletions(-) diff --git a/target-arm/iwmmxt_helper.c b/target-arm/iwmmxt_helper.c index 7953b53..e6cfa62 100644 --- a/target-arm/iwmmxt_helper.c +++ b/target-arm/iwmmxt_helper.c @@ -577,7 +577,7 @@ uint64_t HELPER(iwmmxt_rorl)(CPUARMState *env, uint64_t x, uint32_t n) uint64_t HELPER(iwmmxt_rorq)(CPUARMState *env, uint64_t x, uint32_t n) { - x = (x >> n) | (x << (64 - n)); + x = ror64(x, n); env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = NZBIT64(x); return x; } diff --git a/tcg/optimize.c b/tcg/optimize.c index b35868a..adb5258 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -236,20 +236,16 @@ static TCGArg do_constant_folding_2(TCGOpcode op, TCGArg x, TCGArg y) return (int64_t)x >> (int64_t)y; case INDEX_op_rotr_i32: - x = ((uint32_t)x << (32 - y)) | ((uint32_t)x >> y); - return x; + return ror32(x, y); case INDEX_op_rotr_i64: - x = ((uint64_t)x << (64 - y)) | ((uint64_t)x >> y); - return x; + return ror64(x, y); case INDEX_op_rotl_i32: - x = ((uint32_t)x << y) | ((uint32_t)x >> (32 - y)); - return x; + return rol32(x, y); case INDEX_op_rotl_i64: - x = ((uint64_t)x << y) | ((uint64_t)x >> (64 - y)); - return x; + return rol64(x, y); CASE_OP_32_64(not): return ~x; diff --git a/tci.c b/tci.c index b09ad25..53c4b66 100644 --- a/tci.c +++ b/tci.c @@ -688,13 +688,13 @@ tcg_target_ulong tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr) t0 = *tb_ptr++; t1 = tci_read_ri32(&tb_ptr); t2 = tci_read_ri32(&tb_ptr); - tci_write_reg32(t0, (t1 << t2) | (t1 >> (32 - t2))); + tci_write_reg32(t0, rol32(t1, t2)); break; case INDEX_op_rotr_i32: t0 = *tb_ptr++; t1 = tci_read_ri32(&tb_ptr); t2 = tci_read_ri32(&tb_ptr); - tci_write_reg32(t0, (t1 >> t2) | (t1 << (32 - t2))); + tci_write_reg32(t0, ror32(t1, t2)); break; #endif #if TCG_TARGET_HAS_deposit_i32 @@ -955,13 +955,13 @@ tcg_target_ulong tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr) t0 = *tb_ptr++; t1 = tci_read_ri64(&tb_ptr); t2 = tci_read_ri64(&tb_ptr); - tci_write_reg64(t0, (t1 << t2) | (t1 >> (64 - t2))); + tci_write_reg64(t0, rol64(t1, t2)); break; case INDEX_op_rotr_i64: t0 = *tb_ptr++; t1 = tci_read_ri64(&tb_ptr); t2 = tci_read_ri64(&tb_ptr); - tci_write_reg64(t0, (t1 >> t2) | (t1 << (64 - t2))); + tci_write_reg64(t0, ror64(t1, t2)); break; #endif #if TCG_TARGET_HAS_deposit_i64