diff mbox

[RFC,06/21] target-arm: add arm_is_secure() helper

Message ID 1386060535-15908-7-git-send-email-s.fedorov@samsung.com
State New
Headers show

Commit Message

Sergey Fedorov Dec. 3, 2013, 8:48 a.m. UTC
arm_is_secure() helper allows to determine CPU security state.

Signed-off-by: Sergey Fedorov <s.fedorov@samsung.com>
---
 target-arm/cpu.h |   11 +++++++++++
 1 file changed, 11 insertions(+)

Comments

Peter Crosthwaite Dec. 19, 2013, 3:31 a.m. UTC | #1
On Tue, Dec 3, 2013 at 6:48 PM, Sergey Fedorov <s.fedorov@samsung.com> wrote:
> arm_is_secure() helper allows to determine CPU security state.
>

Helper in the target-foo context usually refers to a TCG->C code
helper fn, whereas you are using in a general sense. Just
s/helper/function.

> Signed-off-by: Sergey Fedorov <s.fedorov@samsung.com>
> ---
>  target-arm/cpu.h |   11 +++++++++++
>  1 file changed, 11 insertions(+)
>
> diff --git a/target-arm/cpu.h b/target-arm/cpu.h
> index 94d8bd1..a00c86f 100644
> --- a/target-arm/cpu.h
> +++ b/target-arm/cpu.h
> @@ -474,6 +474,17 @@ static inline int arm_feature(CPUARMState *env, int feature)
>      return (env->features & (1ULL << feature)) != 0;
>  }
>
> +/* Return non-zero if the processor is in Secure state */

"Return true"

Regards,
Peter

> +static inline bool arm_is_secure(CPUARMState *env)
> +{
> +#if !defined(CONFIG_USER_ONLY)
> +    return ((env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_MON) ||
> +            !(env->cp15.c1_scr & 1);
> +#else
> +    return false;
> +#endif
> +}
> +
>  void arm_cpu_list(FILE *f, fprintf_function cpu_fprintf);
>
>  /* Interface between CPU and Interrupt controller.  */
> --
> 1.7.9.5
>
>
diff mbox

Patch

diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 94d8bd1..a00c86f 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -474,6 +474,17 @@  static inline int arm_feature(CPUARMState *env, int feature)
     return (env->features & (1ULL << feature)) != 0;
 }
 
+/* Return non-zero if the processor is in Secure state */
+static inline bool arm_is_secure(CPUARMState *env)
+{
+#if !defined(CONFIG_USER_ONLY)
+    return ((env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_MON) ||
+            !(env->cp15.c1_scr & 1);
+#else
+    return false;
+#endif
+}
+
 void arm_cpu_list(FILE *f, fprintf_function cpu_fprintf);
 
 /* Interface between CPU and Interrupt controller.  */