From patchwork Fri Nov 29 20:42:32 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 295523 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id D1CCD2C009F for ; Sat, 30 Nov 2013 07:43:55 +1100 (EST) Received: from localhost ([::1]:49375 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VmUum-0005pv-Q9 for incoming@patchwork.ozlabs.org; Fri, 29 Nov 2013 15:43:52 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43680) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VmUu6-0005bI-AI for qemu-devel@nongnu.org; Fri, 29 Nov 2013 15:43:16 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VmUu0-0004ZR-BU for qemu-devel@nongnu.org; Fri, 29 Nov 2013 15:43:10 -0500 Received: from mail-qe0-x233.google.com ([2607:f8b0:400d:c02::233]:45705) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VmUu0-0004ZG-2J for qemu-devel@nongnu.org; Fri, 29 Nov 2013 15:43:04 -0500 Received: by mail-qe0-f51.google.com with SMTP id 1so8882965qee.10 for ; Fri, 29 Nov 2013 12:43:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=QU3kIR1gAyzKM7SB6xDByUSXEKAW5INhxVSeFlGCGj0=; b=pdiKvkpsdXK37909gXraQ+TvFa4Kggh7X50vQ8+f3EAsjwNY08KBexynTkCDCr7/4s oOssQwbGgZ79Tst3xnqehaZDkAECwfEsn2ObkwxN0yQ/R1nWuRlZ41mI0CoMl4YKRvpE NQypc0z6objZ6HhezcEUIzCIP2X9qw1Q9sK6ZkEPSf0/SglZOZp0t5KWBt9QFAAzA3Te vttORVAzr11Yjt0KliYeakDG2GQuLFgB8qyvkvW9/+jlHh6acP0kA7IPfvkACZDuEANC G7SYysQtmPa5GVxD0SO4gul/TJz/8kbjcM7VdliBeLrStxYtLRSWF6/uHoVG5jyu5+Zq UtMw== X-Received: by 10.49.94.33 with SMTP id cz1mr90518969qeb.23.1385757783251; Fri, 29 Nov 2013 12:43:03 -0800 (PST) Received: from pebble.twiddle.net.twiddle.net ([172.56.1.101]) by mx.google.com with ESMTPSA id a5sm65405613qae.2.2013.11.29.12.43.00 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 29 Nov 2013 12:43:02 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sat, 30 Nov 2013 09:42:32 +1300 Message-Id: <1385757754-10702-5-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1385757754-10702-1-git-send-email-rth@twiddle.net> References: <1385757754-10702-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400d:c02::233 Cc: aliguori@amazon.com Subject: [Qemu-devel] [PULL 4/6] tcg-s390: Use qemu_getauxval in query_facilities X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org No need to set up a SIGILL signal handler for detection anymore. Remove a ton of sanity checks that must be true, given that we're requiring a 64-bit build (the note about 31-bit KVM is satisfied by configuring with TCI). Signed-off-by: Richard Henderson --- include/elf.h | 14 ++++++++ tcg/s390/tcg-target.c | 95 +++++++-------------------------------------------- 2 files changed, 26 insertions(+), 83 deletions(-) diff --git a/include/elf.h b/include/elf.h index 6610ca2..667af6f 100644 --- a/include/elf.h +++ b/include/elf.h @@ -479,6 +479,20 @@ typedef struct { #define HWCAP_SPARC_V9 16 #define HWCAP_SPARC_ULTRA3 32 +/* Bits present in AT_HWCAP for s390. */ + +#define HWCAP_S390_ESAN3 1 +#define HWCAP_S390_ZARCH 2 +#define HWCAP_S390_STFLE 4 +#define HWCAP_S390_MSA 8 +#define HWCAP_S390_LDISP 16 +#define HWCAP_S390_EIMM 32 +#define HWCAP_S390_DFP 64 +#define HWCAP_S390_HPAGE 128 +#define HWCAP_S390_ETF3EH 256 +#define HWCAP_S390_HIGH_GPRS 512 +#define HWCAP_S390_TE 1024 + /* * 68k ELF relocation types */ diff --git a/tcg/s390/tcg-target.c b/tcg/s390/tcg-target.c index 0a4f3be..248726e 100644 --- a/tcg/s390/tcg-target.c +++ b/tcg/s390/tcg-target.c @@ -31,6 +31,8 @@ #error "unsupported code generation mode" #endif +#include "elf.h" + /* ??? The translation blocks produced by TCG are generally small enough to be entirely reachable with a 16-bit displacement. Leaving the option for a 32-bit displacement here Just In Case. */ @@ -2233,91 +2235,18 @@ static void sigill_handler(int sig) static void query_facilities(void) { - struct sigaction sa_old, sa_new; - register int r0 __asm__("0"); - register void *r1 __asm__("1"); - int fail; - - memset(&sa_new, 0, sizeof(sa_new)); - sa_new.sa_handler = sigill_handler; - sigaction(SIGILL, &sa_new, &sa_old); - - /* First, try STORE FACILITY LIST EXTENDED. If this is present, then - we need not do any more probing. Unfortunately, this itself is an - extension and the original STORE FACILITY LIST instruction is - kernel-only, storing its results at absolute address 200. */ - /* stfle 0(%r1) */ - r1 = &facilities; - asm volatile(".word 0xb2b0,0x1000" - : "=r"(r0) : "0"(0), "r"(r1) : "memory", "cc"); - - if (got_sigill) { - /* STORE FACILITY EXTENDED is not available. Probe for one of each - kind of instruction that we're interested in. */ - /* ??? Possibly some of these are in practice never present unless - the store-facility-extended facility is also present. But since - that isn't documented it's just better to probe for each. */ - - /* Test for z/Architecture. Required even in 31-bit mode. */ - got_sigill = 0; - /* agr %r0,%r0 */ - asm volatile(".word 0xb908,0x0000" : "=r"(r0) : : "cc"); - if (!got_sigill) { - facilities |= FACILITY_ZARCH_ACTIVE; - } - - /* Test for long displacement. */ - got_sigill = 0; - /* ly %r0,0(%r1) */ - r1 = &facilities; - asm volatile(".word 0xe300,0x1000,0x0058" - : "=r"(r0) : "r"(r1) : "cc"); - if (!got_sigill) { - facilities |= FACILITY_LONG_DISP; - } - - /* Test for extended immediates. */ - got_sigill = 0; - /* afi %r0,0 */ - asm volatile(".word 0xc209,0x0000,0x0000" : : : "cc"); - if (!got_sigill) { - facilities |= FACILITY_EXT_IMM; - } - - /* Test for general-instructions-extension. */ - got_sigill = 0; - /* msfi %r0,1 */ - asm volatile(".word 0xc201,0x0000,0x0001"); - if (!got_sigill) { - facilities |= FACILITY_GEN_INST_EXT; - } - } - - sigaction(SIGILL, &sa_old, NULL); + unsigned long hwcap = qemu_getauxval(AT_HWCAP); - /* The translator currently uses these extensions unconditionally. - Pruning this back to the base ESA/390 architecture doesn't seem - worthwhile, since even the KVM target requires z/Arch. */ - fail = 0; - if ((facilities & FACILITY_ZARCH_ACTIVE) == 0) { - fprintf(stderr, "TCG: z/Arch facility is required.\n"); - fprintf(stderr, "TCG: Boot with a 64-bit enabled kernel.\n"); - fail = 1; - } - if ((facilities & FACILITY_LONG_DISP) == 0) { - fprintf(stderr, "TCG: long-displacement facility is required.\n"); - fail = 1; - } + /* Is STORE FACILITY LIST EXTENDED available? Honestly, I believe this + is present on all 64-bit systems, but let's check for it anyway. */ + if (hwcap & HWCAP_S390_STFLE) { + register int r0 __asm__("0"); + register void *r1 __asm__("1"); - /* So far there's just enough support for 31-bit mode to let the - compile succeed. This is good enough to run QEMU with KVM. */ - if (sizeof(void *) != 8) { - fprintf(stderr, "TCG: 31-bit mode is not supported.\n"); - fail = 1; - } - - if (fail) { - exit(-1); + /* stfle 0(%r1) */ + r1 = &facilities; + asm volatile(".word 0xb2b0,0x1000" + : "=r"(r0) : "0"(0), "r"(r1) : "memory", "cc"); } }