From patchwork Fri Nov 29 03:00:06 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 295112 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id DDBD52C007B for ; Fri, 29 Nov 2013 14:35:48 +1100 (EST) Received: from localhost ([::1]:45020 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VmETE-0006DD-Ie for incoming@patchwork.ozlabs.org; Thu, 28 Nov 2013 22:10:20 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40233) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VmELp-0003Y9-8I for qemu-devel@nongnu.org; Thu, 28 Nov 2013 22:02:47 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VmELj-0002Jm-9w for qemu-devel@nongnu.org; Thu, 28 Nov 2013 22:02:41 -0500 Received: from mail-pd0-x22e.google.com ([2607:f8b0:400e:c02::22e]:36216) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VmELj-0002JW-2k for qemu-devel@nongnu.org; Thu, 28 Nov 2013 22:02:35 -0500 Received: by mail-pd0-f174.google.com with SMTP id y13so13032034pdi.33 for ; Thu, 28 Nov 2013 19:02:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:subject:date:message-id:in-reply-to:references; bh=eTUi58CsVRvUA37qJm77bEpCxEc8UDdWfsyBnE8A3Yg=; b=jAxGQfnLyDNzn/uQNSyLuCOELBMryWH/nPJDNfKvjbnD/gQiJ1Nn2bL2ISWKM9uuRW 2uhbzOxNHSzHx3EyZo7+DhcqpwWWwRISNlJfSO5BcTP14ZJqBkeXHjXXGUTO3zlk6HsH BPAfMF5DGGsAv/Fwmu3pvp08K4/0SP7ISyD0kdIR6poi8THvSnnKdQNEw6p2Pe5odpj5 l7r1r9LeyMiK3VzfBA9h7Zlr23Yul/eTWLUWqnjl1+p1NutCtmSS/nSZQU1VhGRRnoqG sI6ZdlH8C2bzOJkWI4YUHBOjRtJ0IaK06so6h6zX/9WzrlcX/YwUQgM71Cwp5P/TJriy WLJg== X-Received: by 10.66.216.162 with SMTP id or2mr786122pac.179.1385694154125; Thu, 28 Nov 2013 19:02:34 -0800 (PST) Received: from pebble.twiddle.net.twiddle.net ([172.56.32.137]) by mx.google.com with ESMTPSA id hw10sm98475726pbc.24.2013.11.28.19.02.31 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 28 Nov 2013 19:02:33 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 29 Nov 2013 16:00:06 +1300 Message-Id: <1385694047-6116-20-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1385694047-6116-1-git-send-email-rth@twiddle.net> References: <1385694047-6116-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400e:c02::22e Subject: [Qemu-devel] [PATCH v2 19/60] target-i386: Tidy gen_op_mov_TN_reg+tcg_gen_trunc_tl_i32 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org For the 16 and 32-bit cases, we don't need to truncate via a temporary register. Signed-off-by: Richard Henderson --- target-i386/translate.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index 107f0e6..16fae82 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -1259,8 +1259,7 @@ static inline void gen_ins(DisasContext *s, int ot) case of page fault. */ gen_op_movl_T0_0(); gen_op_st_v(s, ot, cpu_T[0], cpu_A0); - gen_op_mov_TN_reg(MO_16, 1, R_EDX); - tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[1]); + tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_regs[R_EDX]); tcg_gen_andi_i32(cpu_tmp2_i32, cpu_tmp2_i32, 0xffff); gen_helper_in_func(ot, cpu_T[0], cpu_tmp2_i32); gen_op_st_v(s, ot, cpu_T[0], cpu_A0); @@ -1277,8 +1276,7 @@ static inline void gen_outs(DisasContext *s, int ot) gen_string_movl_A0_ESI(s); gen_op_ld_v(s, ot, cpu_T[0], cpu_A0); - gen_op_mov_TN_reg(MO_16, 1, R_EDX); - tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[1]); + tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_regs[R_EDX]); tcg_gen_andi_i32(cpu_tmp2_i32, cpu_tmp2_i32, 0xffff); tcg_gen_trunc_tl_i32(cpu_tmp3_i32, cpu_T[0]); gen_helper_out_func(ot, cpu_tmp2_i32, cpu_tmp3_i32); @@ -3838,8 +3836,7 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b, ot = MO_64; } - gen_op_mov_TN_reg(MO_32, 0, reg); - tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); + tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_regs[reg]); gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 0); gen_helper_crc32(cpu_T[0], cpu_tmp2_i32, cpu_T[0], tcg_const_i32(8 << ot));