From patchwork Mon Nov 11 16:06:16 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Michael S. Tsirkin" X-Patchwork-Id: 290367 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 029822C00AC for ; Tue, 12 Nov 2013 03:03:59 +1100 (EST) Received: from localhost ([::1]:37943 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Vftxz-0005yp-0A for incoming@patchwork.ozlabs.org; Mon, 11 Nov 2013 11:03:55 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53914) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VftxX-0005ya-1V for qemu-devel@nongnu.org; Mon, 11 Nov 2013 11:03:31 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VftxQ-0004zV-Fz for qemu-devel@nongnu.org; Mon, 11 Nov 2013 11:03:26 -0500 Received: from mx1.redhat.com ([209.132.183.28]:8881) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VftxQ-0004z4-8q; Mon, 11 Nov 2013 11:03:20 -0500 Received: from int-mx02.intmail.prod.int.phx2.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id rABG3I8S020371 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Mon, 11 Nov 2013 11:03:18 -0500 Received: from redhat.com (vpn1-4-246.ams2.redhat.com [10.36.4.246]) by int-mx02.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with SMTP id rABG3GL7011409; Mon, 11 Nov 2013 11:03:16 -0500 Date: Mon, 11 Nov 2013 18:06:16 +0200 From: "Michael S. Tsirkin" To: qemu-devel@nongnu.org Message-ID: <1384159176-31662-2-git-send-email-mst@redhat.com> References: <1384159176-31662-1-git-send-email-mst@redhat.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1384159176-31662-1-git-send-email-mst@redhat.com> X-Mutt-Fcc: =sent X-Scanned-By: MIMEDefang 2.67 on 10.5.11.12 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 209.132.183.28 Cc: qemu-stable@nongnu.org, Anthony Liguori , Cole Robinson Subject: [Qemu-devel] [PULL 1/6] Fix pc migration from qemu <= 1.5 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Cole Robinson The following commit introduced a migration incompatibility: commit 568f0690fd9aa4d39d84b04c1a5dbb53a915c3fe Author: David Gibson Date: Thu Jun 6 18:48:49 2013 +1000 pci: Replace pci_find_domain() with more general pci_root_bus_path() The issue is that i440fx savevm idstr went from 0000:00:00.0/I440FX to 0000:00.0/I440FX. Unfortunately we are stuck with the breakage for 1.6 machine types. Add a compat property to maintain the busted idstr for the 1.6 machine types, but revert to the old style format for 1.7+, and <= 1.5. Tested with migration from qemu 1.5, qemu 1.6, and qemu.git. Cc: qemu-stable@nongnu.org Signed-off-by: Cole Robinson Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- include/hw/i386/pc.h | 16 ++++++++++++++++ include/hw/pci-host/q35.h | 1 + hw/pci-host/piix.c | 9 ++++++++- hw/pci-host/q35.c | 10 ++++++++-- 4 files changed, 33 insertions(+), 3 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 03cc0ba..57e8d16 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -260,6 +260,14 @@ int e820_add_entry(uint64_t, uint64_t, uint32_t); .driver = "qemu32-" TYPE_X86_CPU,\ .property = "model",\ .value = stringify(3),\ + },{\ + .driver = "i440FX-pcihost",\ + .property = "short_root_bus",\ + .value = stringify(1),\ + },{\ + .driver = "q35-pcihost",\ + .property = "short_root_bus",\ + .value = stringify(1),\ } #define PC_COMPAT_1_5 \ @@ -296,6 +304,14 @@ int e820_add_entry(uint64_t, uint64_t, uint32_t); .driver = TYPE_X86_CPU,\ .property = "pmu",\ .value = "on",\ + },{\ + .driver = "i440FX-pcihost",\ + .property = "short_root_bus",\ + .value = stringify(0),\ + },{\ + .driver = "q35-pcihost",\ + .property = "short_root_bus",\ + .value = stringify(0),\ } #define PC_COMPAT_1_4 \ diff --git a/include/hw/pci-host/q35.h b/include/hw/pci-host/q35.h index aee91aa..309065f 100644 --- a/include/hw/pci-host/q35.h +++ b/include/hw/pci-host/q35.h @@ -61,6 +61,7 @@ typedef struct MCHPCIState { ram_addr_t above_4g_mem_size; uint64_t pci_hole64_size; PcGuestInfo *guest_info; + uint32_t short_root_bus; } MCHPCIState; typedef struct Q35PCIHost { diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c index bad3953..edc974e 100644 --- a/hw/pci-host/piix.c +++ b/hw/pci-host/piix.c @@ -48,6 +48,7 @@ typedef struct I440FXState { PCIHostState parent_obj; PcPciInfo pci_info; uint64_t pci_hole64_size; + uint32_t short_root_bus; } I440FXState; #define PIIX_NUM_PIC_IRQS 16 /* i8259 * 2 */ @@ -720,13 +721,19 @@ static const TypeInfo i440fx_info = { static const char *i440fx_pcihost_root_bus_path(PCIHostState *host_bridge, PCIBus *rootbus) { + I440FXState *s = I440FX_PCI_HOST_BRIDGE(host_bridge); + /* For backwards compat with old device paths */ - return "0000"; + if (s->short_root_bus) { + return "0000"; + } + return "0000:00"; } static Property i440fx_props[] = { DEFINE_PROP_SIZE(PCI_HOST_PROP_PCI_HOLE64_SIZE, I440FXState, pci_hole64_size, DEFAULT_PCI_HOLE64_SIZE), + DEFINE_PROP_UINT32("short_root_bus", I440FXState, short_root_bus, 0), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index b8feed1..c043998 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -61,8 +61,13 @@ static void q35_host_realize(DeviceState *dev, Error **errp) static const char *q35_host_root_bus_path(PCIHostState *host_bridge, PCIBus *rootbus) { - /* For backwards compat with old device paths */ - return "0000"; + Q35PCIHost *s = Q35_HOST_DEVICE(host_bridge); + + /* For backwards compat with old device paths */ + if (s->mch.short_root_bus) { + return "0000"; + } + return "0000:00"; } static void q35_host_get_pci_hole_start(Object *obj, Visitor *v, @@ -124,6 +129,7 @@ static Property mch_props[] = { MCH_HOST_BRIDGE_PCIEXBAR_DEFAULT), DEFINE_PROP_SIZE(PCI_HOST_PROP_PCI_HOLE64_SIZE, Q35PCIHost, mch.pci_hole64_size, DEFAULT_PCI_HOLE64_SIZE), + DEFINE_PROP_UINT32("short_root_bus", Q35PCIHost, mch.short_root_bus, 0), DEFINE_PROP_END_OF_LIST(), };