From patchwork Thu Nov 7 01:05:01 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 289091 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id B926A2C0092 for ; Thu, 7 Nov 2013 12:31:44 +1100 (EST) Received: from localhost ([::1]:36986 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VeEGZ-0000EW-6x for incoming@patchwork.ozlabs.org; Wed, 06 Nov 2013 20:20:11 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38072) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VeE4b-00007f-M9 for qemu-devel@nongnu.org; Wed, 06 Nov 2013 20:07:55 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VeE4V-0006QS-QG for qemu-devel@nongnu.org; Wed, 06 Nov 2013 20:07:49 -0500 Received: from mail-pb0-x236.google.com ([2607:f8b0:400e:c01::236]:47787) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VeE4V-0006QH-Au for qemu-devel@nongnu.org; Wed, 06 Nov 2013 20:07:43 -0500 Received: by mail-pb0-f54.google.com with SMTP id ro12so306113pbb.27 for ; Wed, 06 Nov 2013 17:07:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:subject:date:message-id:in-reply-to:references; bh=KXa3AvaVv5/iSjDU4aEsp+fcqv/bYcLwABGG0zGQUuU=; b=oCuzhWWw3fnmfYhP+esmWABvnqWa+IXg9bjp/tqcGAXrzPMHHF5YO26a/6DQMtWX9r GJOCfX6iz58T58wYRPnQcYffRkBlvPtFCBv1IeqzfCrg+J5BS5q9LIz1yH36C7Lhky3I lBoiKkWTQhHRitTOtCB8N0H2nQ5AnM+YCHiKuAnljzVYT9CazhboaEIWYKGd0AQ31Yg5 LExaUlVKQ0A2060gZ+0K5qH5wcACE/mfkXKDoxaj38JKdjekTnsN7gZOsh2fUY5C3eNQ A0nxdXFbwhu8zrqjcJrZVVLOiWPxjpzuJXaoilw+Ay3+o9IdSBWyFXKUsm+5pgRGDKrl 8Zhw== X-Received: by 10.67.3.34 with SMTP id bt2mr6847826pad.3.1383786462281; Wed, 06 Nov 2013 17:07:42 -0800 (PST) Received: from pebble.com (CPE-138-130-249-46.lnse4.cha.bigpond.net.au. [138.130.249.46]) by mx.google.com with ESMTPSA id xs1sm1726198pac.7.2013.11.06.17.07.40 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 06 Nov 2013 17:07:41 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 7 Nov 2013 11:05:01 +1000 Message-Id: <1383786324-18415-39-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1383786324-18415-1-git-send-email-rth@twiddle.net> References: <1383786324-18415-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400e:c01::236 Subject: [Qemu-devel] [PATCH for-1.8 38/61] target-i386: Fix addr32 prefix in gen_lea_modrm X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Fix the following run-test-x86_64 testsuite failures: -lea (%%eax) = 0000000000000001 -lea (%%ebx) = 0000000000000002 -lea (%%ecx) = 0000000000000004 -lea (%%edx) = 0000000000000008 -lea (%%esi) = 0000000000000010 -lea (%%edi) = 0000000000000020 +lea (%%eax) = 0000abcc00000001 +lea (%%ebx) = 0000abcf00000002 +lea (%%ecx) = 0000abc900000004 +lea (%%edx) = 0000abc500000008 +lea (%%esi) = 0000abdd00000010 +lea (%%edi) = 0000abed00000020 In addition, reduce ifdeffery and minimize the number of TCG ops produced during address computation. Signed-off-by: Richard Henderson --- target-i386/translate.c | 87 ++++++++++++++++++++++++++++--------------------- 1 file changed, 49 insertions(+), 38 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index fcc787d..7024cfd 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -1904,6 +1904,7 @@ static void gen_lea_modrm(CPUX86State *env, DisasContext *s, int modrm) int index; int scale; int mod, rm, code, override, must_add_seg; + TCGv sum; override = s->override; must_add_seg = s->addseg; @@ -1913,11 +1914,13 @@ static void gen_lea_modrm(CPUX86State *env, DisasContext *s, int modrm) rm = modrm & 7; switch (s->aflag) { +#ifdef TARGET_X86_64 case MO_64: +#endif case MO_32: havesib = 0; base = rm; - index = 0; + index = -1; scale = 0; if (base == 4) { @@ -1925,6 +1928,9 @@ static void gen_lea_modrm(CPUX86State *env, DisasContext *s, int modrm) code = cpu_ldub_code(env, s->pc++); scale = (code >> 6) & 3; index = ((code >> 3) & 7) | REX_X(s); + if (index == 4) { + index = -1; /* no index */ + } base = (code & 7); } base |= REX_B(s); @@ -1952,52 +1958,57 @@ static void gen_lea_modrm(CPUX86State *env, DisasContext *s, int modrm) break; } - if (base >= 0) { - /* for correct popl handling with esp */ - if (base == 4 && s->popl_esp_hack) - disp += s->popl_esp_hack; -#ifdef TARGET_X86_64 - if (s->aflag == MO_64) { - gen_op_movq_A0_reg(base); - if (disp != 0) { - gen_op_addq_A0_im(disp); - } - } else -#endif - { - gen_op_movl_A0_reg(base); - if (disp != 0) - gen_op_addl_A0_im(disp); - } - } else { - tcg_gen_movi_tl(cpu_A0, disp); + /* For correct popl handling with esp. */ + if (base == R_ESP && s->popl_esp_hack) { + disp += s->popl_esp_hack; } - /* index == 4 means no index */ - if (havesib && (index != 4)) { -#ifdef TARGET_X86_64 - if (s->aflag == MO_64) { - gen_op_addq_A0_reg_sN(scale, index); - } else -#endif - { - gen_op_addl_A0_reg_sN(scale, index); + + /* Compute the address, with a minimum number of TCG ops. */ + TCGV_UNUSED(sum); + if (index >= 0) { + if (scale == 0) { + sum = cpu_regs[index]; + } else { + tcg_gen_shli_tl(cpu_A0, cpu_regs[index], scale); + sum = cpu_A0; + } + if (base >= 0) { + tcg_gen_add_tl(cpu_A0, sum, cpu_regs[base]); + sum = cpu_A0; } + } else if (base >= 0) { + sum = cpu_regs[base]; } + if (TCGV_IS_UNUSED(sum)) { + tcg_gen_movi_tl(cpu_A0, disp); + } else { + tcg_gen_addi_tl(cpu_A0, sum, disp); + } + if (must_add_seg) { if (override < 0) { - if (base == R_EBP || base == R_ESP) + if (base == R_EBP || base == R_ESP) { override = R_SS; - else + } else { override = R_DS; + } } -#ifdef TARGET_X86_64 - if (s->aflag == MO_64) { - gen_op_addq_A0_seg(override); - } else -#endif - { - gen_op_addl_A0_seg(s, override); + + tcg_gen_ld_tl(cpu_tmp0, cpu_env, + offsetof(CPUX86State, segs[override].base)); + if (CODE64(s)) { + if (s->aflag == MO_32) { + tcg_gen_ext32u_tl(cpu_A0, cpu_A0); + } + tcg_gen_add_tl(cpu_A0, cpu_A0, cpu_tmp0); + break; } + + tcg_gen_add_tl(cpu_A0, cpu_A0, cpu_tmp0); + } + + if (s->aflag == MO_32) { + tcg_gen_ext32u_tl(cpu_A0, cpu_A0); } break;