From patchwork Wed Oct 30 16:28:40 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 287287 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 022E72C038B for ; Thu, 31 Oct 2013 03:45:31 +1100 (EST) Received: from localhost ([::1]:53415 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VbYfz-0003gp-IH for incoming@patchwork.ozlabs.org; Wed, 30 Oct 2013 12:31:23 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56089) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VbYdh-0000PE-8W for qemu-devel@nongnu.org; Wed, 30 Oct 2013 12:29:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VbYdb-0005ip-Vh for qemu-devel@nongnu.org; Wed, 30 Oct 2013 12:29:01 -0400 Received: from mx1.redhat.com ([209.132.183.28]:61977) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VbYdb-0005iN-Mw for qemu-devel@nongnu.org; Wed, 30 Oct 2013 12:28:55 -0400 Received: from int-mx11.intmail.prod.int.phx2.redhat.com (int-mx11.intmail.prod.int.phx2.redhat.com [10.5.11.24]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id r9UGSpYo019700 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Wed, 30 Oct 2013 12:28:51 -0400 Received: from blackfin.pond.sub.org (ovpn-116-24.ams2.redhat.com [10.36.116.24]) by int-mx11.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id r9UGSlcl013534 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Wed, 30 Oct 2013 12:28:50 -0400 Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 0EE51200C9; Wed, 30 Oct 2013 17:28:45 +0100 (CET) From: armbru@redhat.com To: qemu-devel@nongnu.org Date: Wed, 30 Oct 2013 17:28:40 +0100 Message-Id: <1383150524-16250-7-git-send-email-armbru@redhat.com> In-Reply-To: <1383150524-16250-1-git-send-email-armbru@redhat.com> References: <1383150524-16250-1-git-send-email-armbru@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.24 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 209.132.183.28 Cc: kwolf@redhat.com, peter.maydell@linaro.org, marcel.a@redhat.com, borntraeger@de.ibm.com, aliguori@amazon.com, afaerber@suse.de Subject: [Qemu-devel] [PATCH v3 06/10] ich9: Document why cannot_instantiate_with_device_add_yet X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Markus Armbruster An ICH9 southbridge contains several PCI devices, some of them with multiple functions. We model each function as a separate qdev. Two of them need some special wiring set up in pc_q35_init() to work: the LPC controller at 00:1f.0, and the SMBus controller at 00:1f.3. Signed-off-by: Markus Armbruster Reviewed-by: Peter Maydell --- hw/i2c/smbus_ich9.c | 6 +++++- hw/isa/lpc_ich9.c | 7 +++++-- 2 files changed, 10 insertions(+), 3 deletions(-) diff --git a/hw/i2c/smbus_ich9.c b/hw/i2c/smbus_ich9.c index c1ffa34..8d47eaf 100644 --- a/hw/i2c/smbus_ich9.c +++ b/hw/i2c/smbus_ich9.c @@ -97,11 +97,15 @@ static void ich9_smb_class_init(ObjectClass *klass, void *data) k->device_id = PCI_DEVICE_ID_INTEL_ICH9_6; k->revision = ICH9_A2_SMB_REVISION; k->class_id = PCI_CLASS_SERIAL_SMBUS; - dc->cannot_instantiate_with_device_add_yet = true; /* FIXME explain why */ dc->vmsd = &vmstate_ich9_smbus; dc->desc = "ICH9 SMBUS Bridge"; k->init = ich9_smbus_initfn; k->config_write = ich9_smbus_write_config; + /* + * Reason: part of ICH9 southbridge, needs to be wired up by + * pc_q35_init() + */ + dc->cannot_instantiate_with_device_add_yet = true; } i2c_bus *ich9_smb_init(PCIBus *bus, int devfn, uint32_t smb_io_base) diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c index ad841b5..d00d698 100644 --- a/hw/isa/lpc_ich9.c +++ b/hw/isa/lpc_ich9.c @@ -604,14 +604,17 @@ static void ich9_lpc_class_init(ObjectClass *klass, void *data) dc->reset = ich9_lpc_reset; k->init = ich9_lpc_initfn; dc->vmsd = &vmstate_ich9_lpc; - dc->cannot_instantiate_with_device_add_yet = true; /* FIXME explain why */ k->config_write = ich9_lpc_config_write; dc->desc = "ICH9 LPC bridge"; k->vendor_id = PCI_VENDOR_ID_INTEL; k->device_id = PCI_DEVICE_ID_INTEL_ICH9_8; k->revision = ICH9_A2_LPC_REVISION; k->class_id = PCI_CLASS_BRIDGE_ISA; - + /* + * Reason: part of ICH9 southbridge, needs to be wired up by + * pc_q35_init() + */ + dc->cannot_instantiate_with_device_add_yet = true; } static const TypeInfo ich9_lpc_info = {