@@ -1055,11 +1055,23 @@ PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size,
/* setup pci memory address space mapping into system address space */
void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory,
- MemoryRegion *pci_address_space)
+ MemoryRegion *pci_address_space,
+ uint64_t pcimem64_min_addr)
{
+ uint64_t *val;
+ FWCfgState *fw_cfg = fw_cfg_find();
+
/* Set to lower priority than RAM */
memory_region_add_subregion_overlap(system_memory, 0x0,
pci_address_space, -1);
+ g_assert(fw_cfg);
+ /*
+ * Align address at 1G, this makes sure it can be exactly covered
+ * with a PAT entry even when using huge pages.
+ */
+ val = g_malloc(sizeof(*val));
+ *val = cpu_to_le64(ROUND_UP(pcimem64_min_addr, 0x1ULL << 30));
+ fw_cfg_add_file(fw_cfg, "etc/pcimem64-minimum-address", val, sizeof(*val));
}
void pc_acpi_init(const char *default_dsdt)
@@ -351,7 +351,8 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state,
/* setup pci memory mapping */
pc_pci_as_mapping_init(OBJECT(f), f->system_memory,
- f->pci_address_space);
+ f->pci_address_space,
+ 0x100000000ULL + above_4g_mem_size);
memory_region_init_alias(&f->smram_region, OBJECT(d), "smram-region",
f->pci_address_space, 0xa0000, 0x20000);
@@ -339,7 +339,8 @@ static int mch_init(PCIDevice *d)
/* setup pci memory mapping */
pc_pci_as_mapping_init(OBJECT(mch), mch->system_memory,
- mch->pci_address_space);
+ mch->pci_address_space,
+ 0x100000000ULL + mch->above_4g_mem_size);
/* smram */
cpu_smm_register(&mch_set_smm, mch);
@@ -110,7 +110,8 @@ PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size,
void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory,
- MemoryRegion *pci_address_space);
+ MemoryRegion *pci_address_space,
+ uint64_t pcimem64_min_addr);
FWCfgState *pc_memory_init(MemoryRegion *system_memory,
const char *kernel_filename,
'etc/pcimem64-minimum-address' will allow QEMU to tell BIOS where PCI memory address space mapping could start in high memory. Allowing BIOS to start mapping 64-bit PCI BARs at address where it wouldn't conflict with other mappings QEMU might place before it. That permits QEMU to reserve extra address space before 64-bit PCI hole for memory hotplug. Related SeaBIOS patch: http://patchwork.ozlabs.org/patch/283623/ Signed-off-by: Igor Mammedov <imammedo@redhat.com> --- hw/i386/pc.c | 14 +++++++++++++- hw/pci-host/piix.c | 3 ++- hw/pci-host/q35.c | 3 ++- include/hw/i386/pc.h | 3 ++- 4 files changed, 19 insertions(+), 4 deletions(-)