From patchwork Fri Oct 25 21:27:33 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Graf X-Patchwork-Id: 286212 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 4795F2C0196 for ; Sat, 26 Oct 2013 08:34:54 +1100 (EST) Received: from localhost ([::1]:60886 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VZp1w-0004j5-CZ for incoming@patchwork.ozlabs.org; Fri, 25 Oct 2013 17:34:52 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33096) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VZovU-0003nw-KG for qemu-devel@nongnu.org; Fri, 25 Oct 2013 17:28:23 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VZovJ-0002ZI-7g for qemu-devel@nongnu.org; Fri, 25 Oct 2013 17:28:12 -0400 Received: from cantor2.suse.de ([195.135.220.15]:39243 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VZovI-0002YC-Ts; Fri, 25 Oct 2013 17:28:01 -0400 Received: from relay1.suse.de (unknown [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id 5ABA7A5ACE; Fri, 25 Oct 2013 23:27:59 +0200 (CEST) From: Alexander Graf To: QEMU Developers Date: Fri, 25 Oct 2013 23:27:33 +0200 Message-Id: <1382736474-32128-9-git-send-email-agraf@suse.de> X-Mailer: git-send-email 1.7.12.4 In-Reply-To: <1382736474-32128-1-git-send-email-agraf@suse.de> References: <1382736474-32128-1-git-send-email-agraf@suse.de> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x X-Received-From: 195.135.220.15 Cc: Blue Swirl , Alexey Kardashevskiy , "qemu-ppc@nongnu.org list:PowerPC" , Anthony Liguori , Aurelien Jarno Subject: [Qemu-devel] [PULL 08/29] spapr-rtas: fix h_rtas parameters reading X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Alexey Kardashevskiy On the real hardware, RTAS is called in real mode and therefore top 4 bits of the address passed in the call are ignored. So does the patch. This converts h_rtas() to use existing rtas_ld() handlers. This fixed rtas_ld()/rtas_st() to ignore top 4 bits. Signed-off-by: Alexey Kardashevskiy Signed-off-by: Alexander Graf --- hw/ppc/spapr_hcall.c | 6 +++--- include/hw/ppc/spapr.h | 9 +++++++-- 2 files changed, 10 insertions(+), 5 deletions(-) diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c index f10ba8a..f755a53 100644 --- a/hw/ppc/spapr_hcall.c +++ b/hw/ppc/spapr_hcall.c @@ -521,9 +521,9 @@ static target_ulong h_rtas(PowerPCCPU *cpu, sPAPREnvironment *spapr, target_ulong opcode, target_ulong *args) { target_ulong rtas_r3 = args[0]; - uint32_t token = ldl_be_phys(rtas_r3); - uint32_t nargs = ldl_be_phys(rtas_r3 + 4); - uint32_t nret = ldl_be_phys(rtas_r3 + 8); + uint32_t token = rtas_ld(rtas_r3, 0); + uint32_t nargs = rtas_ld(rtas_r3, 1); + uint32_t nret = rtas_ld(rtas_r3, 2); return spapr_rtas_call(cpu, spapr, token, nargs, rtas_r3 + 12, nret, rtas_r3 + 12 + 4*nargs); diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index e37b419..6407c8a 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -332,14 +332,19 @@ static inline int spapr_allocate_lsi(int hint) return spapr_allocate_irq(hint, true); } +static inline uint64_t ppc64_phys_to_real(uint64_t addr) +{ + return addr & ~0xF000000000000000ULL; +} + static inline uint32_t rtas_ld(target_ulong phys, int n) { - return ldl_be_phys(phys + 4*n); + return ldl_be_phys(ppc64_phys_to_real(phys + 4*n)); } static inline void rtas_st(target_ulong phys, int n, uint32_t val) { - stl_be_phys(phys + 4*n, val); + stl_be_phys(ppc64_phys_to_real(phys + 4*n), val); } typedef void (*spapr_rtas_fn)(PowerPCCPU *cpu, sPAPREnvironment *spapr,