From patchwork Thu Sep 12 03:25:15 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: pingfan liu X-Patchwork-Id: 274411 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id D6FB72C0137 for ; Thu, 12 Sep 2013 13:26:28 +1000 (EST) Received: from localhost ([::1]:39102 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VJxY2-0005OK-OU for incoming@patchwork.ozlabs.org; Wed, 11 Sep 2013 23:26:26 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38012) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VJxXZ-0005Bb-Ba for qemu-devel@nongnu.org; Wed, 11 Sep 2013 23:26:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VJxXQ-0003Ak-UE for qemu-devel@nongnu.org; Wed, 11 Sep 2013 23:25:57 -0400 Received: from mail-ob0-x230.google.com ([2607:f8b0:4003:c01::230]:63274) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VJxXQ-0003Af-PK for qemu-devel@nongnu.org; Wed, 11 Sep 2013 23:25:48 -0400 Received: by mail-ob0-f176.google.com with SMTP id uy5so12645obc.35 for ; Wed, 11 Sep 2013 20:25:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=SJc6CtnFqVad/WZ3LpBlzaQixddM84CBnWGUQ3FS/XY=; b=sn2IhO0g9srkuJ82CSlUFyMSW1h8vgUEha8y811/71yHG0Q9zTb80bdLV9VeG7N38/ hAJHQdqPwfIeQo63YVoeC9+ZxB5GmxSoeTOKqdNHXq9+sbACspz5QaR/YtOIcqPng5fj VLRQTiysmiyP5jkQsTmIsgPbFinVOfVQLw5VEoVStKMfRCyevhLvIjxo2X8OAt5t//Dc FhHq0oF4ml1Bw8wgtNEKBDpD5DvxHCjP155LAKX16iVk+yhzzBMnz23qO96FlU/+rRND +t3vJa3McC+irCShzlIvNH2i13Z93EFCA6CPEizUW9Pz+ewvUx9oc4t3kcJTyXFKZ26X VH/Q== X-Received: by 10.60.50.135 with SMTP id c7mr4533695oeo.41.1378956348165; Wed, 11 Sep 2013 20:25:48 -0700 (PDT) Received: from localhost ([111.192.251.249]) by mx.google.com with ESMTPSA id rr6sm2428511oeb.0.1969.12.31.16.00.00 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Wed, 11 Sep 2013 20:25:47 -0700 (PDT) From: Liu Ping Fan To: qemu-devel@nongnu.org Date: Thu, 12 Sep 2013 11:25:15 +0800 Message-Id: <1378956318-23395-3-git-send-email-pingfank@linux.vnet.ibm.com> X-Mailer: git-send-email 1.8.1.4 In-Reply-To: <1378956318-23395-1-git-send-email-pingfank@linux.vnet.ibm.com> References: <1378956318-23395-1-git-send-email-pingfank@linux.vnet.ibm.com> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:4003:c01::230 Cc: Peter Maydell , Anthony Liguori , Jan Kiszka , Stefan Hajnoczi , Paolo Bonzini , =?UTF-8?q?Andreas=20F=C3=A4rber?= Subject: [Qemu-devel] [PATCH v5 2/5] hpet: entitle more irq pins for hpet X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org On PC, IRQ2/8 can be reserved for hpet timer 0/1. And pin 16~23 of ioapic can be dynamically assigned to hpet as guest chooses. (Will enable them after introducing pc 1.6 compat) Signed-off-by: Liu Ping Fan --- hw/timer/hpet.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c index 8429eb3..46903b9 100644 --- a/hw/timer/hpet.c +++ b/hw/timer/hpet.c @@ -25,6 +25,7 @@ */ #include "hw/hw.h" +#include "hw/boards.h" #include "hw/i386/pc.h" #include "ui/console.h" #include "qemu/timer.h" @@ -42,6 +43,12 @@ #define HPET_MSI_SUPPORT 0 +/* For bug compat, using only IRQ2. Soon it will be fixed as + * 0xff0104ULL, i.e using IRQ16~23, IRQ8 and IRQ2 after + * introducing pc-1.6 compat. + */ +#define HPET_TN_INT_CAP_DEFAULT 0x4ULL + #define TYPE_HPET "hpet" #define HPET(obj) OBJECT_CHECK(HPETState, (obj), TYPE_HPET) @@ -73,6 +80,7 @@ typedef struct HPETState { uint8_t rtc_irq_level; qemu_irq pit_enabled; uint8_t num_timers; + uint32_t intcap; HPETTimer timer[HPET_MAX_TIMERS]; /* Memory-mapped, software visible registers */ @@ -663,8 +671,8 @@ static void hpet_reset(DeviceState *d) if (s->flags & (1 << HPET_MSI_SUPPORT)) { timer->config |= HPET_TN_FSB_CAP; } - /* advertise availability of ioapic inti2 */ - timer->config |= 0x00000004ULL << 32; + /* advertise availability of ioapic int */ + timer->config |= (uint64_t)s->intcap << 32; timer->period = 0ULL; timer->wrap_flag = 0; } @@ -753,6 +761,7 @@ static void hpet_realize(DeviceState *dev, Error **errp) static Property hpet_device_properties[] = { DEFINE_PROP_UINT8("timers", HPETState, num_timers, HPET_MIN_TIMERS), DEFINE_PROP_BIT("msi", HPETState, flags, HPET_MSI_SUPPORT, false), + DEFINE_PROP_UINT32("intcap", HPETState, intcap, HPET_TN_INT_CAP_DEFAULT), DEFINE_PROP_END_OF_LIST(), };