From patchwork Wed Sep 11 14:37:29 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 274298 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 091FB2C007E for ; Thu, 12 Sep 2013 00:42:27 +1000 (EST) Received: from localhost ([::1]:36310 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VJlce-0002A8-SQ for incoming@patchwork.ozlabs.org; Wed, 11 Sep 2013 10:42:24 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34511) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VJlYN-0005dU-Vl for qemu-devel@nongnu.org; Wed, 11 Sep 2013 10:38:08 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VJlYH-0005e9-10 for qemu-devel@nongnu.org; Wed, 11 Sep 2013 10:37:59 -0400 Received: from cantor2.suse.de ([195.135.220.15]:45131 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VJlYG-0005dC-QE for qemu-devel@nongnu.org; Wed, 11 Sep 2013 10:37:52 -0400 Received: from relay1.suse.de (unknown [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id 526C6A52D9; Wed, 11 Sep 2013 16:37:52 +0200 (CEST) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: qemu-devel@nongnu.org Date: Wed, 11 Sep 2013 16:37:29 +0200 Message-Id: <1378910260-7688-14-git-send-email-afaerber@suse.de> X-Mailer: git-send-email 1.8.1.4 In-Reply-To: <1378910260-7688-1-git-send-email-afaerber@suse.de> References: <1378910260-7688-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x X-Received-From: 195.135.220.15 Cc: Peter Maydell , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Paul Brook Subject: [Qemu-devel] [PATCH v4 13/24] a15mpcore: Prepare for QOM embedding X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Andreas Färber Signed-off-by: Andreas Färber --- hw/cpu/a15mpcore.c | 21 +-------------------- include/hw/cpu/a15mpcore.h | 44 ++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 45 insertions(+), 20 deletions(-) create mode 100644 include/hw/cpu/a15mpcore.h diff --git a/hw/cpu/a15mpcore.c b/hw/cpu/a15mpcore.c index 10dc35a..acc419e 100644 --- a/hw/cpu/a15mpcore.c +++ b/hw/cpu/a15mpcore.c @@ -18,27 +18,8 @@ * with this program; if not, see . */ -#include "hw/sysbus.h" +#include "hw/cpu/a15mpcore.h" #include "sysemu/kvm.h" -#include "hw/intc/arm_gic.h" - -/* A15MP private memory region. */ - -#define TYPE_A15MPCORE_PRIV "a15mpcore_priv" -#define A15MPCORE_PRIV(obj) \ - OBJECT_CHECK(A15MPPrivState, (obj), TYPE_A15MPCORE_PRIV) - -typedef struct A15MPPrivState { - /*< private >*/ - SysBusDevice parent_obj; - /*< public >*/ - - uint32_t num_cpu; - uint32_t num_irq; - MemoryRegion container; - - GICState gic; -} A15MPPrivState; static void a15mp_priv_set_irq(void *opaque, int irq, int level) { diff --git a/include/hw/cpu/a15mpcore.h b/include/hw/cpu/a15mpcore.h new file mode 100644 index 0000000..b423533 --- /dev/null +++ b/include/hw/cpu/a15mpcore.h @@ -0,0 +1,44 @@ +/* + * Cortex-A15MPCore internal peripheral emulation. + * + * Copyright (c) 2012 Linaro Limited. + * Written by Peter Maydell. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, see . + */ +#ifndef HW_CPU_A15MPCORE_H +#define HW_CPU_A15MPCORE_H + +#include "hw/sysbus.h" +#include "hw/intc/arm_gic.h" + +/* A15MP private memory region. */ + +#define TYPE_A15MPCORE_PRIV "a15mpcore_priv" +#define A15MPCORE_PRIV(obj) \ + OBJECT_CHECK(A15MPPrivState, (obj), TYPE_A15MPCORE_PRIV) + +typedef struct A15MPPrivState { + /*< private >*/ + SysBusDevice parent_obj; + /*< public >*/ + + uint32_t num_cpu; + uint32_t num_irq; + MemoryRegion container; + + GICState gic; +} A15MPPrivState; + +#endif