diff mbox

[4/6] pci: add helper to retrieve the 64-bit range

Message ID 1378291667-8516-5-git-send-email-mst@redhat.com
State New
Headers show

Commit Message

Michael S. Tsirkin Sept. 4, 2013, 10:48 a.m. UTC 
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
 include/hw/pci/pci.h |  1 +
 hw/pci/pci.c         | 43 +++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 44 insertions(+)

Comments

Igor Mammedov Sept. 10, 2013, 1:40 p.m. UTC | #1 
On Wed, 4 Sep 2013 13:48:37 +0300
"Michael S. Tsirkin" <mst@redhat.com> wrote:

> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
> ---
>  include/hw/pci/pci.h |  1 +
>  hw/pci/pci.c         | 43 +++++++++++++++++++++++++++++++++++++++++++
>  2 files changed, 44 insertions(+)
> 
> diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
> index 2374aa9..7be93ae 100644
> --- a/include/hw/pci/pci.h
> +++ b/include/hw/pci/pci.h
> @@ -397,6 +397,7 @@ const char *pci_root_bus_path(PCIDevice *dev);
>  PCIDevice *pci_find_device(PCIBus *bus, int bus_num, uint8_t devfn);
>  int pci_qdev_find_device(const char *id, PCIDevice **pdev);
>  PCIBus *pci_get_bus_devfn(int *devfnp, PCIBus *root, const char *devaddr);
> +void pci_bus_get_w64_range(PCIBus *bus, Range *range);
>  
>  int pci_parse_devaddr(const char *addr, int *domp, int *busp,
>                        unsigned int *slotp, unsigned int *funcp);
> diff --git a/hw/pci/pci.c b/hw/pci/pci.c
> index 8c33352..d9f9bdf 100644
> --- a/hw/pci/pci.c
> +++ b/hw/pci/pci.c
> @@ -2257,6 +2257,49 @@ void pci_setup_iommu(PCIBus *bus, PCIIOMMUFunc fn, void *opaque)
>      bus->iommu_opaque = opaque;
>  }
>  
> +static void pci_dev_get_w64(PCIBus *b, PCIDevice *dev, void *opaque)
> +{
> +    Range *range = opaque;
> +    PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev);
> +    uint16_t cmd = pci_get_word(dev->config + PCI_COMMAND);
> +    int r;
> +
> +    if (!(cmd & PCI_COMMAND_MEMORY)) {
> +        return;
> +    }
> +
> +    if (pc->is_bridge) {
> +        pcibus_t base = pci_bridge_get_base(dev, PCI_BASE_ADDRESS_MEM_PREFETCH);
what guaranties that 'base' won't be below 4Gb and be above '4Gb + above_4g_mem_size'?

> +        pcibus_t limit = pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_MEM_PREFETCH);
> +
> +        if (limit >= base) {
> +            Range pref_range;
> +            pref_range.begin = base;
> +            pref_range.end = limit + 1;
> +            range_extend(range, &pref_range);
> +        }
> +    }
> +    for (r = 0; r < PCI_NUM_REGIONS; ++r) {
> +        PCIIORegion *region = &dev->io_regions[r];
> +        Range region_range;
> +
> +        if (!region->size ||
> +            (region->type & PCI_BASE_ADDRESS_SPACE_IO) ||
> +            !(region->type & PCI_BASE_ADDRESS_MEM_TYPE_64)) {
> +            continue;
> +        }
> +        region_range.begin = pci_get_quad(dev->config + pci_bar(dev, r));
> +        region_range.end = region_range.begin + region->size;
> +        range_extend(range, &region_range);
> +    }
> +}
> +
> +void pci_bus_get_w64_range(PCIBus *bus, Range *range)
> +{
> +    range->begin = range->end = 0;
> +    pci_for_each_device_under_bus(bus, pci_dev_get_w64, range);
> +}
> +
>  static const TypeInfo pci_device_type_info = {
>      .name = TYPE_PCI_DEVICE,
>      .parent = TYPE_DEVICE,
Michael S. Tsirkin Sept. 10, 2013, 1:50 p.m. UTC | #2 
On Tue, Sep 10, 2013 at 03:40:03PM +0200, Igor Mammedov wrote:
> On Wed, 4 Sep 2013 13:48:37 +0300
> "Michael S. Tsirkin" <mst@redhat.com> wrote:
> 
> > Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
> > ---
> >  include/hw/pci/pci.h |  1 +
> >  hw/pci/pci.c         | 43 +++++++++++++++++++++++++++++++++++++++++++
> >  2 files changed, 44 insertions(+)
> > 
> > diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
> > index 2374aa9..7be93ae 100644
> > --- a/include/hw/pci/pci.h
> > +++ b/include/hw/pci/pci.h
> > @@ -397,6 +397,7 @@ const char *pci_root_bus_path(PCIDevice *dev);
> >  PCIDevice *pci_find_device(PCIBus *bus, int bus_num, uint8_t devfn);
> >  int pci_qdev_find_device(const char *id, PCIDevice **pdev);
> >  PCIBus *pci_get_bus_devfn(int *devfnp, PCIBus *root, const char *devaddr);
> > +void pci_bus_get_w64_range(PCIBus *bus, Range *range);
> >  
> >  int pci_parse_devaddr(const char *addr, int *domp, int *busp,
> >                        unsigned int *slotp, unsigned int *funcp);
> > diff --git a/hw/pci/pci.c b/hw/pci/pci.c
> > index 8c33352..d9f9bdf 100644
> > --- a/hw/pci/pci.c
> > +++ b/hw/pci/pci.c
> > @@ -2257,6 +2257,49 @@ void pci_setup_iommu(PCIBus *bus, PCIIOMMUFunc fn, void *opaque)
> >      bus->iommu_opaque = opaque;
> >  }
> >  
> > +static void pci_dev_get_w64(PCIBus *b, PCIDevice *dev, void *opaque)
> > +{
> > +    Range *range = opaque;
> > +    PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev);
> > +    uint16_t cmd = pci_get_word(dev->config + PCI_COMMAND);
> > +    int r;
> > +
> > +    if (!(cmd & PCI_COMMAND_MEMORY)) {
> > +        return;
> > +    }
> > +
> > +    if (pc->is_bridge) {
> > +        pcibus_t base = pci_bridge_get_base(dev, PCI_BASE_ADDRESS_MEM_PREFETCH);
> what guaranties that 'base' won't be below 4Gb

Hmm, this needs some thought.

> and be above '4Gb + above_4g_mem_size'?

This one is harmless - guest will only hurt itself if
it misconfigures the bridge like this.

> > +        pcibus_t limit = pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_MEM_PREFETCH);
> > +
> > +        if (limit >= base) {
> > +            Range pref_range;
> > +            pref_range.begin = base;
> > +            pref_range.end = limit + 1;
> > +            range_extend(range, &pref_range);
> > +        }
> > +    }
> > +    for (r = 0; r < PCI_NUM_REGIONS; ++r) {
> > +        PCIIORegion *region = &dev->io_regions[r];
> > +        Range region_range;
> > +
> > +        if (!region->size ||
> > +            (region->type & PCI_BASE_ADDRESS_SPACE_IO) ||
> > +            !(region->type & PCI_BASE_ADDRESS_MEM_TYPE_64)) {
> > +            continue;
> > +        }
> > +        region_range.begin = pci_get_quad(dev->config + pci_bar(dev, r));
> > +        region_range.end = region_range.begin + region->size;
> > +        range_extend(range, &region_range);
> > +    }
> > +}
> > +
> > +void pci_bus_get_w64_range(PCIBus *bus, Range *range)
> > +{
> > +    range->begin = range->end = 0;
> > +    pci_for_each_device_under_bus(bus, pci_dev_get_w64, range);
> > +}
> > +
> >  static const TypeInfo pci_device_type_info = {
> >      .name = TYPE_PCI_DEVICE,
> >      .parent = TYPE_DEVICE,
Igor Mammedov Sept. 10, 2013, 5:05 p.m. UTC | #3 
On Tue, 10 Sep 2013 16:50:41 +0300
"Michael S. Tsirkin" <mst@redhat.com> wrote:

> On Tue, Sep 10, 2013 at 03:40:03PM +0200, Igor Mammedov wrote:
> > On Wed, 4 Sep 2013 13:48:37 +0300
> > "Michael S. Tsirkin" <mst@redhat.com> wrote:
> > 
> > > Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
> > > ---
> > >  include/hw/pci/pci.h |  1 +
> > >  hw/pci/pci.c         | 43 +++++++++++++++++++++++++++++++++++++++++++
> > >  2 files changed, 44 insertions(+)
> > > 
> > > diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
> > > index 2374aa9..7be93ae 100644
> > > --- a/include/hw/pci/pci.h
> > > +++ b/include/hw/pci/pci.h
> > > @@ -397,6 +397,7 @@ const char *pci_root_bus_path(PCIDevice *dev);
> > >  PCIDevice *pci_find_device(PCIBus *bus, int bus_num, uint8_t devfn);
> > >  int pci_qdev_find_device(const char *id, PCIDevice **pdev);
> > >  PCIBus *pci_get_bus_devfn(int *devfnp, PCIBus *root, const char *devaddr);
> > > +void pci_bus_get_w64_range(PCIBus *bus, Range *range);
> > >  
> > >  int pci_parse_devaddr(const char *addr, int *domp, int *busp,
> > >                        unsigned int *slotp, unsigned int *funcp);
> > > diff --git a/hw/pci/pci.c b/hw/pci/pci.c
> > > index 8c33352..d9f9bdf 100644
> > > --- a/hw/pci/pci.c
> > > +++ b/hw/pci/pci.c
> > > @@ -2257,6 +2257,49 @@ void pci_setup_iommu(PCIBus *bus, PCIIOMMUFunc fn, void *opaque)
> > >      bus->iommu_opaque = opaque;
> > >  }
> > >  
> > > +static void pci_dev_get_w64(PCIBus *b, PCIDevice *dev, void *opaque)
> > > +{
> > > +    Range *range = opaque;
> > > +    PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev);
> > > +    uint16_t cmd = pci_get_word(dev->config + PCI_COMMAND);
> > > +    int r;
> > > +
> > > +    if (!(cmd & PCI_COMMAND_MEMORY)) {
> > > +        return;
> > > +    }
> > > +
> > > +    if (pc->is_bridge) {
> > > +        pcibus_t base = pci_bridge_get_base(dev, PCI_BASE_ADDRESS_MEM_PREFETCH);
> > what guaranties that 'base' won't be below 4Gb
> 
> Hmm, this needs some thought.
> 
> > and be above '4Gb + above_4g_mem_size'?
> 
> This one is harmless - guest will only hurt itself if
> it misconfigures the bridge like this.

start of w64 is hardcoded in QEMU and Seabios as (4Gb+above_4gb_ram_size),
so maybe there is no need to update/modify it at all?


> 
> > > +        pcibus_t limit = pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_MEM_PREFETCH);
> > > +
> > > +        if (limit >= base) {
> > > +            Range pref_range;
> > > +            pref_range.begin = base;
> > > +            pref_range.end = limit + 1;
> > > +            range_extend(range, &pref_range);
> > > +        }
> > > +    }
> > > +    for (r = 0; r < PCI_NUM_REGIONS; ++r) {
> > > +        PCIIORegion *region = &dev->io_regions[r];
> > > +        Range region_range;
> > > +
> > > +        if (!region->size ||
> > > +            (region->type & PCI_BASE_ADDRESS_SPACE_IO) ||
> > > +            !(region->type & PCI_BASE_ADDRESS_MEM_TYPE_64)) {
> > > +            continue;
> > > +        }
> > > +        region_range.begin = pci_get_quad(dev->config + pci_bar(dev, r));
> > > +        region_range.end = region_range.begin + region->size;
> > > +        range_extend(range, &region_range);
> > > +    }
> > > +}
> > > +
> > > +void pci_bus_get_w64_range(PCIBus *bus, Range *range)
> > > +{
> > > +    range->begin = range->end = 0;
> > > +    pci_for_each_device_under_bus(bus, pci_dev_get_w64, range);
> > > +}
> > > +
> > >  static const TypeInfo pci_device_type_info = {
> > >      .name = TYPE_PCI_DEVICE,
> > >      .parent = TYPE_DEVICE,
Michael S. Tsirkin Sept. 10, 2013, 5:28 p.m. UTC | #4 
On Tue, Sep 10, 2013 at 07:05:10PM +0200, Igor Mammedov wrote:
> On Tue, 10 Sep 2013 16:50:41 +0300
> "Michael S. Tsirkin" <mst@redhat.com> wrote:
> 
> > On Tue, Sep 10, 2013 at 03:40:03PM +0200, Igor Mammedov wrote:
> > > On Wed, 4 Sep 2013 13:48:37 +0300
> > > "Michael S. Tsirkin" <mst@redhat.com> wrote:
> > > 
> > > > Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
> > > > ---
> > > >  include/hw/pci/pci.h |  1 +
> > > >  hw/pci/pci.c         | 43 +++++++++++++++++++++++++++++++++++++++++++
> > > >  2 files changed, 44 insertions(+)
> > > > 
> > > > diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
> > > > index 2374aa9..7be93ae 100644
> > > > --- a/include/hw/pci/pci.h
> > > > +++ b/include/hw/pci/pci.h
> > > > @@ -397,6 +397,7 @@ const char *pci_root_bus_path(PCIDevice *dev);
> > > >  PCIDevice *pci_find_device(PCIBus *bus, int bus_num, uint8_t devfn);
> > > >  int pci_qdev_find_device(const char *id, PCIDevice **pdev);
> > > >  PCIBus *pci_get_bus_devfn(int *devfnp, PCIBus *root, const char *devaddr);
> > > > +void pci_bus_get_w64_range(PCIBus *bus, Range *range);
> > > >  
> > > >  int pci_parse_devaddr(const char *addr, int *domp, int *busp,
> > > >                        unsigned int *slotp, unsigned int *funcp);
> > > > diff --git a/hw/pci/pci.c b/hw/pci/pci.c
> > > > index 8c33352..d9f9bdf 100644
> > > > --- a/hw/pci/pci.c
> > > > +++ b/hw/pci/pci.c
> > > > @@ -2257,6 +2257,49 @@ void pci_setup_iommu(PCIBus *bus, PCIIOMMUFunc fn, void *opaque)
> > > >      bus->iommu_opaque = opaque;
> > > >  }
> > > >  
> > > > +static void pci_dev_get_w64(PCIBus *b, PCIDevice *dev, void *opaque)
> > > > +{
> > > > +    Range *range = opaque;
> > > > +    PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev);
> > > > +    uint16_t cmd = pci_get_word(dev->config + PCI_COMMAND);
> > > > +    int r;
> > > > +
> > > > +    if (!(cmd & PCI_COMMAND_MEMORY)) {
> > > > +        return;
> > > > +    }
> > > > +
> > > > +    if (pc->is_bridge) {
> > > > +        pcibus_t base = pci_bridge_get_base(dev, PCI_BASE_ADDRESS_MEM_PREFETCH);
> > > what guaranties that 'base' won't be below 4Gb
> > 
> > Hmm, this needs some thought.
> > 
> > > and be above '4Gb + above_4g_mem_size'?
> > 
> > This one is harmless - guest will only hurt itself if
> > it misconfigures the bridge like this.
> 
> start of w64 is hardcoded in QEMU and Seabios as (4Gb+above_4gb_ram_size),
> so maybe there is no need to update/modify it at all?
> 

Well the point is to have QEMU obey whatever bios does.
seabios hardcodes the start of window but some other
firmware might not.


> > 
> > > > +        pcibus_t limit = pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_MEM_PREFETCH);
> > > > +
> > > > +        if (limit >= base) {
> > > > +            Range pref_range;
> > > > +            pref_range.begin = base;
> > > > +            pref_range.end = limit + 1;
> > > > +            range_extend(range, &pref_range);
> > > > +        }
> > > > +    }
> > > > +    for (r = 0; r < PCI_NUM_REGIONS; ++r) {
> > > > +        PCIIORegion *region = &dev->io_regions[r];
> > > > +        Range region_range;
> > > > +
> > > > +        if (!region->size ||
> > > > +            (region->type & PCI_BASE_ADDRESS_SPACE_IO) ||
> > > > +            !(region->type & PCI_BASE_ADDRESS_MEM_TYPE_64)) {
> > > > +            continue;
> > > > +        }
> > > > +        region_range.begin = pci_get_quad(dev->config + pci_bar(dev, r));
> > > > +        region_range.end = region_range.begin + region->size;
> > > > +        range_extend(range, &region_range);
> > > > +    }
> > > > +}
> > > > +
> > > > +void pci_bus_get_w64_range(PCIBus *bus, Range *range)
> > > > +{
> > > > +    range->begin = range->end = 0;
> > > > +    pci_for_each_device_under_bus(bus, pci_dev_get_w64, range);
> > > > +}
> > > > +
> > > >  static const TypeInfo pci_device_type_info = {
> > > >      .name = TYPE_PCI_DEVICE,
> > > >      .parent = TYPE_DEVICE,
diff mbox

Patch

diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index 2374aa9..7be93ae 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -397,6 +397,7 @@  const char *pci_root_bus_path(PCIDevice *dev);
 PCIDevice *pci_find_device(PCIBus *bus, int bus_num, uint8_t devfn);
 int pci_qdev_find_device(const char *id, PCIDevice **pdev);
 PCIBus *pci_get_bus_devfn(int *devfnp, PCIBus *root, const char *devaddr);
+void pci_bus_get_w64_range(PCIBus *bus, Range *range);
 
 int pci_parse_devaddr(const char *addr, int *domp, int *busp,
                       unsigned int *slotp, unsigned int *funcp);
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index 8c33352..d9f9bdf 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -2257,6 +2257,49 @@  void pci_setup_iommu(PCIBus *bus, PCIIOMMUFunc fn, void *opaque)
     bus->iommu_opaque = opaque;
 }
 
+static void pci_dev_get_w64(PCIBus *b, PCIDevice *dev, void *opaque)
+{
+    Range *range = opaque;
+    PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev);
+    uint16_t cmd = pci_get_word(dev->config + PCI_COMMAND);
+    int r;
+
+    if (!(cmd & PCI_COMMAND_MEMORY)) {
+        return;
+    }
+
+    if (pc->is_bridge) {
+        pcibus_t base = pci_bridge_get_base(dev, PCI_BASE_ADDRESS_MEM_PREFETCH);
+        pcibus_t limit = pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_MEM_PREFETCH);
+
+        if (limit >= base) {
+            Range pref_range;
+            pref_range.begin = base;
+            pref_range.end = limit + 1;
+            range_extend(range, &pref_range);
+        }
+    }
+    for (r = 0; r < PCI_NUM_REGIONS; ++r) {
+        PCIIORegion *region = &dev->io_regions[r];
+        Range region_range;
+
+        if (!region->size ||
+            (region->type & PCI_BASE_ADDRESS_SPACE_IO) ||
+            !(region->type & PCI_BASE_ADDRESS_MEM_TYPE_64)) {
+            continue;
+        }
+        region_range.begin = pci_get_quad(dev->config + pci_bar(dev, r));
+        region_range.end = region_range.begin + region->size;
+        range_extend(range, &region_range);
+    }
+}
+
+void pci_bus_get_w64_range(PCIBus *bus, Range *range)
+{
+    range->begin = range->end = 0;
+    pci_for_each_device_under_bus(bus, pci_dev_get_w64, range);
+}
+
 static const TypeInfo pci_device_type_info = {
     .name = TYPE_PCI_DEVICE,
     .parent = TYPE_DEVICE,