| Message ID | 1355972844-30235-1-git-send-email-xudong.hao@intel.com |
|---|---|
| State | New |
| Headers | show |
On Thu, Dec 20, 2012 at 11:07:23AM +0800, Xudong Hao wrote: > Enable 64 bits bar emulation. > > v3 changes from v2: > - Leave original error string and drop the leading 016. > > v2 changes from v1: > - Change 0lx% to 0x%016 when print a 64 bit variable. > > Test pass with the current seabios which already support 64bit pci bars. > > Signed-off-by: Xudong Hao <xudong.hao@intel.com> Alex, is this OK with you now? > --- > hw/kvm/pci-assign.c | 14 ++++++++++---- > 1 files changed, 10 insertions(+), 4 deletions(-) > > diff --git a/hw/kvm/pci-assign.c b/hw/kvm/pci-assign.c > index 7a0998c..2271a2e 100644 > --- a/hw/kvm/pci-assign.c > +++ b/hw/kvm/pci-assign.c > @@ -46,6 +46,7 @@ > #define IORESOURCE_IRQ 0x00000400 > #define IORESOURCE_DMA 0x00000800 > #define IORESOURCE_PREFETCH 0x00002000 /* No side effects */ > +#define IORESOURCE_MEM_64 0x00100000 > > //#define DEVICE_ASSIGNMENT_DEBUG > > @@ -442,9 +443,13 @@ static int assigned_dev_register_regions(PCIRegion *io_regions, > > /* handle memory io regions */ > if (cur_region->type & IORESOURCE_MEM) { > - int t = cur_region->type & IORESOURCE_PREFETCH > - ? PCI_BASE_ADDRESS_MEM_PREFETCH > - : PCI_BASE_ADDRESS_SPACE_MEMORY; > + int t = PCI_BASE_ADDRESS_SPACE_MEMORY; > + if (cur_region->type & IORESOURCE_PREFETCH) { > + t |= PCI_BASE_ADDRESS_MEM_PREFETCH; > + } > + if (cur_region->type & IORESOURCE_MEM_64) { > + t |= PCI_BASE_ADDRESS_MEM_TYPE_64; > + } > > /* map physical memory */ > pci_dev->v_addrs[i].u.r_virtbase = mmap(NULL, cur_region->size, > @@ -632,7 +637,8 @@ again: > rp->valid = 0; > rp->resource_fd = -1; > size = end - start + 1; > - flags &= IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH; > + flags &= IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH > + | IORESOURCE_MEM_64; > if (size == 0 || (flags & ~IORESOURCE_PREFETCH) == 0) { > continue; > } > -- > 1.5.5 -- Gleb.
Am 20.12.2012 04:07, schrieb Xudong Hao: > Enable 64 bits bar emulation. > > v3 changes from v2: > - Leave original error string and drop the leading 016. > > v2 changes from v1: > - Change 0lx% to 0x%016 when print a 64 bit variable. > > Test pass with the current seabios which already support 64bit pci bars. > > Signed-off-by: Xudong Hao <xudong.hao@intel.com> If this is for qemu.git as indicated by the recient, "qemu-kvm" is misleading and should be dropped from subject. Also, change logs are supposed to go under --- or into a cover letter. Probably the maintainers can fix this for you if the code is fine. Andreas
On Sun, 2012-12-23 at 10:06 +0200, Gleb Natapov wrote: > On Thu, Dec 20, 2012 at 11:07:23AM +0800, Xudong Hao wrote: > > Enable 64 bits bar emulation. > > > > v3 changes from v2: > > - Leave original error string and drop the leading 016. > > > > v2 changes from v1: > > - Change 0lx% to 0x%016 when print a 64 bit variable. > > > > Test pass with the current seabios which already support 64bit pci bars. > > > > Signed-off-by: Xudong Hao <xudong.hao@intel.com> > Alex, is this OK with you now? Yep Reviewed-by: Alex Williamson <alex.williamson@redhat.com> > > --- > > hw/kvm/pci-assign.c | 14 ++++++++++---- > > 1 files changed, 10 insertions(+), 4 deletions(-) > > > > diff --git a/hw/kvm/pci-assign.c b/hw/kvm/pci-assign.c > > index 7a0998c..2271a2e 100644 > > --- a/hw/kvm/pci-assign.c > > +++ b/hw/kvm/pci-assign.c > > @@ -46,6 +46,7 @@ > > #define IORESOURCE_IRQ 0x00000400 > > #define IORESOURCE_DMA 0x00000800 > > #define IORESOURCE_PREFETCH 0x00002000 /* No side effects */ > > +#define IORESOURCE_MEM_64 0x00100000 > > > > //#define DEVICE_ASSIGNMENT_DEBUG > > > > @@ -442,9 +443,13 @@ static int assigned_dev_register_regions(PCIRegion *io_regions, > > > > /* handle memory io regions */ > > if (cur_region->type & IORESOURCE_MEM) { > > - int t = cur_region->type & IORESOURCE_PREFETCH > > - ? PCI_BASE_ADDRESS_MEM_PREFETCH > > - : PCI_BASE_ADDRESS_SPACE_MEMORY; > > + int t = PCI_BASE_ADDRESS_SPACE_MEMORY; > > + if (cur_region->type & IORESOURCE_PREFETCH) { > > + t |= PCI_BASE_ADDRESS_MEM_PREFETCH; > > + } > > + if (cur_region->type & IORESOURCE_MEM_64) { > > + t |= PCI_BASE_ADDRESS_MEM_TYPE_64; > > + } > > > > /* map physical memory */ > > pci_dev->v_addrs[i].u.r_virtbase = mmap(NULL, cur_region->size, > > @@ -632,7 +637,8 @@ again: > > rp->valid = 0; > > rp->resource_fd = -1; > > size = end - start + 1; > > - flags &= IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH; > > + flags &= IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH > > + | IORESOURCE_MEM_64; > > if (size == 0 || (flags & ~IORESOURCE_PREFETCH) == 0) { > > continue; > > } > > -- > > 1.5.5 > > -- > Gleb.
On Thu, Dec 20, 2012 at 11:07:23AM +0800, Xudong Hao wrote: > Enable 64 bits bar emulation. > > v3 changes from v2: > - Leave original error string and drop the leading 016. > > v2 changes from v1: > - Change 0lx% to 0x%016 when print a 64 bit variable. > > Test pass with the current seabios which already support 64bit pci bars. > > Signed-off-by: Xudong Hao <xudong.hao@intel.com> Thanks, applied to uq/master. > --- > hw/kvm/pci-assign.c | 14 ++++++++++---- > 1 files changed, 10 insertions(+), 4 deletions(-) > > diff --git a/hw/kvm/pci-assign.c b/hw/kvm/pci-assign.c > index 7a0998c..2271a2e 100644 > --- a/hw/kvm/pci-assign.c > +++ b/hw/kvm/pci-assign.c > @@ -46,6 +46,7 @@ > #define IORESOURCE_IRQ 0x00000400 > #define IORESOURCE_DMA 0x00000800 > #define IORESOURCE_PREFETCH 0x00002000 /* No side effects */ > +#define IORESOURCE_MEM_64 0x00100000 > > //#define DEVICE_ASSIGNMENT_DEBUG > > @@ -442,9 +443,13 @@ static int assigned_dev_register_regions(PCIRegion *io_regions, > > /* handle memory io regions */ > if (cur_region->type & IORESOURCE_MEM) { > - int t = cur_region->type & IORESOURCE_PREFETCH > - ? PCI_BASE_ADDRESS_MEM_PREFETCH > - : PCI_BASE_ADDRESS_SPACE_MEMORY; > + int t = PCI_BASE_ADDRESS_SPACE_MEMORY; > + if (cur_region->type & IORESOURCE_PREFETCH) { > + t |= PCI_BASE_ADDRESS_MEM_PREFETCH; > + } > + if (cur_region->type & IORESOURCE_MEM_64) { > + t |= PCI_BASE_ADDRESS_MEM_TYPE_64; > + } > > /* map physical memory */ > pci_dev->v_addrs[i].u.r_virtbase = mmap(NULL, cur_region->size, > @@ -632,7 +637,8 @@ again: > rp->valid = 0; > rp->resource_fd = -1; > size = end - start + 1; > - flags &= IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH; > + flags &= IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH > + | IORESOURCE_MEM_64; > if (size == 0 || (flags & ~IORESOURCE_PREFETCH) == 0) { > continue; > } > -- > 1.5.5 -- Gleb.
diff --git a/hw/kvm/pci-assign.c b/hw/kvm/pci-assign.c index 7a0998c..2271a2e 100644 --- a/hw/kvm/pci-assign.c +++ b/hw/kvm/pci-assign.c @@ -46,6 +46,7 @@ #define IORESOURCE_IRQ 0x00000400 #define IORESOURCE_DMA 0x00000800 #define IORESOURCE_PREFETCH 0x00002000 /* No side effects */ +#define IORESOURCE_MEM_64 0x00100000 //#define DEVICE_ASSIGNMENT_DEBUG @@ -442,9 +443,13 @@ static int assigned_dev_register_regions(PCIRegion *io_regions, /* handle memory io regions */ if (cur_region->type & IORESOURCE_MEM) { - int t = cur_region->type & IORESOURCE_PREFETCH - ? PCI_BASE_ADDRESS_MEM_PREFETCH - : PCI_BASE_ADDRESS_SPACE_MEMORY; + int t = PCI_BASE_ADDRESS_SPACE_MEMORY; + if (cur_region->type & IORESOURCE_PREFETCH) { + t |= PCI_BASE_ADDRESS_MEM_PREFETCH; + } + if (cur_region->type & IORESOURCE_MEM_64) { + t |= PCI_BASE_ADDRESS_MEM_TYPE_64; + } /* map physical memory */ pci_dev->v_addrs[i].u.r_virtbase = mmap(NULL, cur_region->size, @@ -632,7 +637,8 @@ again: rp->valid = 0; rp->resource_fd = -1; size = end - start + 1; - flags &= IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH; + flags &= IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH + | IORESOURCE_MEM_64; if (size == 0 || (flags & ~IORESOURCE_PREFETCH) == 0) { continue; }
Enable 64 bits bar emulation. v3 changes from v2: - Leave original error string and drop the leading 016. v2 changes from v1: - Change 0lx% to 0x%016 when print a 64 bit variable. Test pass with the current seabios which already support 64bit pci bars. Signed-off-by: Xudong Hao <xudong.hao@intel.com> --- hw/kvm/pci-assign.c | 14 ++++++++++---- 1 files changed, 10 insertions(+), 4 deletions(-)