From patchwork Tue Dec 4 13:04:58 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gerd Hoffmann X-Patchwork-Id: 203645 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id EDA3F2C0090 for ; Wed, 5 Dec 2012 00:58:06 +1100 (EST) Received: from localhost ([::1]:59203 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TfsCw-0002by-K0 for incoming@patchwork.ozlabs.org; Tue, 04 Dec 2012 08:06:42 -0500 Received: from eggs.gnu.org ([208.118.235.92]:35064) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TfsBk-00015m-Iz for qemu-devel@nongnu.org; Tue, 04 Dec 2012 08:05:59 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TfsBa-00068r-OM for qemu-devel@nongnu.org; Tue, 04 Dec 2012 08:05:28 -0500 Received: from mx1.redhat.com ([209.132.183.28]:47400) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TfsBa-00068G-GN for qemu-devel@nongnu.org; Tue, 04 Dec 2012 08:05:18 -0500 Received: from int-mx01.intmail.prod.int.phx2.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id qB4D5HkN019810 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Tue, 4 Dec 2012 08:05:17 -0500 Received: from rincewind.home.kraxel.org (ovpn-116-20.ams2.redhat.com [10.36.116.20]) by int-mx01.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id qB4D5GFI031341; Tue, 4 Dec 2012 08:05:16 -0500 Received: by rincewind.home.kraxel.org (Postfix, from userid 500) id 63D3140A05; Tue, 4 Dec 2012 14:05:15 +0100 (CET) From: Gerd Hoffmann To: qemu-devel@nongnu.org Date: Tue, 4 Dec 2012 14:04:58 +0100 Message-Id: <1354626315-31186-2-git-send-email-kraxel@redhat.com> In-Reply-To: <1354626315-31186-1-git-send-email-kraxel@redhat.com> References: <1354626315-31186-1-git-send-email-kraxel@redhat.com> X-Scanned-By: MIMEDefang 2.67 on 10.5.11.11 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 209.132.183.28 Cc: Gerd Hoffmann Subject: [Qemu-devel] [PATCH 01/18] apci: switch piix4 to memory api X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Gerd Hoffmann --- hw/acpi_piix4.c | 41 ++++++++++++++++++++++++----------------- 1 files changed, 24 insertions(+), 17 deletions(-) diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c index 519269a..320e045 100644 --- a/hw/acpi_piix4.c +++ b/hw/acpi_piix4.c @@ -28,6 +28,7 @@ #include "range.h" #include "ioport.h" #include "fw_cfg.h" +#include "exec-memory.h" //#define DEBUG @@ -55,7 +56,7 @@ struct pci_status { typedef struct PIIX4PMState { PCIDevice dev; - IORange ioport; + MemoryRegion io; ACPIREGS ar; APMState apm; @@ -109,10 +110,10 @@ static void pm_tmr_timer(ACPIREGS *ar) pm_update_sci(s); } -static void pm_ioport_write(IORange *ioport, uint64_t addr, unsigned width, - uint64_t val) +static void pm_ioport_write(void *opaque, hwaddr addr, uint64_t val, + unsigned width) { - PIIX4PMState *s = container_of(ioport, PIIX4PMState, ioport); + PIIX4PMState *s = opaque; if (width != 2) { PIIX4_DPRINTF("PM write port=0x%04x width=%d val=0x%08x\n", @@ -138,10 +139,9 @@ static void pm_ioport_write(IORange *ioport, uint64_t addr, unsigned width, (unsigned int)val); } -static void pm_ioport_read(IORange *ioport, uint64_t addr, unsigned width, - uint64_t *data) +static uint64_t pm_ioport_read(void *opaque, hwaddr addr, unsigned width) { - PIIX4PMState *s = container_of(ioport, PIIX4PMState, ioport); + PIIX4PMState *s = opaque; uint32_t val; switch(addr) { @@ -162,12 +162,17 @@ static void pm_ioport_read(IORange *ioport, uint64_t addr, unsigned width, break; } PIIX4_DPRINTF("PM readw port=0x%04x val=0x%04x\n", (unsigned int)addr, val); - *data = val; + return val; } -static const IORangeOps pm_iorange_ops = { +static const MemoryRegionOps pm_io_ops = { .read = pm_ioport_read, .write = pm_ioport_write, + .valid.min_access_size = 1, + .valid.max_access_size = 4, + .impl.min_access_size = 1, + .impl.max_access_size = 4, + .endianness = DEVICE_LITTLE_ENDIAN, }; static void apm_ctrl_changed(uint32_t val, void *arg) @@ -193,15 +198,13 @@ static void pm_io_space_update(PIIX4PMState *s) { uint32_t pm_io_base; - if (s->dev.config[0x80] & 1) { - pm_io_base = le32_to_cpu(*(uint32_t *)(s->dev.config + 0x40)); - pm_io_base &= 0xffc0; + pm_io_base = le32_to_cpu(*(uint32_t *)(s->dev.config + 0x40)); + pm_io_base &= 0xffc0; - /* XXX: need to improve memory and ioport allocation */ - PIIX4_DPRINTF("PM: mapping to 0x%x\n", pm_io_base); - iorange_init(&s->ioport, &pm_iorange_ops, pm_io_base, 64); - ioport_register(&s->ioport); - } + memory_region_transaction_begin(); + memory_region_set_enabled(&s->io, s->dev.config[0x80] & 1); + memory_region_set_address(&s->io, pm_io_base); + memory_region_transaction_commit(); } static void pm_write_config(PCIDevice *d, @@ -456,6 +459,10 @@ static int piix4_pm_initfn(PCIDevice *dev) register_ioport_write(s->smb_io_base, 64, 1, smb_ioport_writeb, &s->smb); register_ioport_read(s->smb_io_base, 64, 1, smb_ioport_readb, &s->smb); + memory_region_init_io(&s->io, &pm_io_ops, s, "piix4-pm", 64); + memory_region_set_enabled(&s->io, false); + memory_region_add_subregion(get_system_io(), 0, &s->io); + acpi_pm_tmr_init(&s->ar, pm_tmr_timer); acpi_gpe_init(&s->ar, GPE_LEN);