From patchwork Tue Jul 17 12:31:02 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gerd Hoffmann X-Patchwork-Id: 171415 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 86F3A2C00A6 for ; Tue, 17 Jul 2012 22:50:06 +1000 (EST) Received: from localhost ([::1]:41610 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Sr6wP-0003Zv-VK for incoming@patchwork.ozlabs.org; Tue, 17 Jul 2012 08:31:49 -0400 Received: from eggs.gnu.org ([208.118.235.92]:40723) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Sr6vq-000215-Ps for qemu-devel@nongnu.org; Tue, 17 Jul 2012 08:31:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Sr6vg-0007og-Oq for qemu-devel@nongnu.org; Tue, 17 Jul 2012 08:31:14 -0400 Received: from mx1.redhat.com ([209.132.183.28]:34752) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Sr6vg-0007oE-FG for qemu-devel@nongnu.org; Tue, 17 Jul 2012 08:31:04 -0400 Received: from int-mx12.intmail.prod.int.phx2.redhat.com (int-mx12.intmail.prod.int.phx2.redhat.com [10.5.11.25]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id q6HCV3eK019829 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Tue, 17 Jul 2012 08:31:03 -0400 Received: from rincewind.home.kraxel.org (ovpn-116-24.ams2.redhat.com [10.36.116.24]) by int-mx12.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id q6HCV3N4021584; Tue, 17 Jul 2012 08:31:03 -0400 Received: by rincewind.home.kraxel.org (Postfix, from userid 500) id B53E440CD6; Tue, 17 Jul 2012 14:31:02 +0200 (CEST) From: Gerd Hoffmann To: qemu-devel@nongnu.org, seabios@seabios.org Date: Tue, 17 Jul 2012 14:31:02 +0200 Message-Id: <1342528262-11548-4-git-send-email-kraxel@redhat.com> In-Reply-To: <1342528262-11548-1-git-send-email-kraxel@redhat.com> References: <1342528262-11548-1-git-send-email-kraxel@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.25 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.132.183.28 Cc: Gerd Hoffmann Subject: [Qemu-devel] [rfc patch seabios 3/3] wakeup: uhci X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Windup gpe bit 0x0b for s3 wakeup. Also add methods to update the pci config space register 0xc4 which enables/disables wakeup per usb port. Signed-off-by: Gerd Hoffmann --- src/acpi-dsdt.dsl | 41 +++++++++++++++++++++++++++++++++++++++++ 1 files changed, 41 insertions(+), 0 deletions(-) diff --git a/src/acpi-dsdt.dsl b/src/acpi-dsdt.dsl index 03efbfd..07e531d 100644 --- a/src/acpi-dsdt.dsl +++ b/src/acpi-dsdt.dsl @@ -312,6 +312,46 @@ DefinitionBlock ( /**************************************************************** + * USB + ****************************************************************/ + + Scope(\_SB.PCI0) { + Device (UHCI) { + Name (_ADR, 0x00010002) + + OperationRegion (U0CS, PCI_Config, 0xC4, 0x04) + Field (U0CS, DWordAcc, NoLock, Preserve) + { + U0EN, 2, + Offset (0x04) + } + + Name (_S3D, 0x03) + Name (_S3W, 0x03) + + /* Power Resources for Wake */ + Name(_PRW, Package(2) { + 0x0b, // GPE bit + 0x03, // S3 + }) + + /* Power State Wake */ + Method (_PSW, 1, NotSerialized) + { + If (Arg0) + { + Store (0x03, U0EN) + } + Else + { + Store (0x00, U0EN) + } + } + } + } + + +/**************************************************************** * PIIX3 ISA bridge ****************************************************************/ @@ -803,6 +843,7 @@ DefinitionBlock ( Return(0x01) } Method(_L0B) { + Notify(\_SB.PCI0.UHCI, 0x80) Return(0x01) } Method(_L0C) {