From patchwork Tue Jul 10 13:15:52 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Igor Mammedov X-Patchwork-Id: 170176 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 0176A2C0080 for ; Tue, 10 Jul 2012 23:17:26 +1000 (EST) Received: from localhost ([::1]:53833 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SoaJf-00005w-RI for incoming@patchwork.ozlabs.org; Tue, 10 Jul 2012 09:17:23 -0400 Received: from eggs.gnu.org ([208.118.235.92]:44315) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SoaJU-0008Fn-8n for qemu-devel@nongnu.org; Tue, 10 Jul 2012 09:17:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SoaJI-0001bB-Ds for qemu-devel@nongnu.org; Tue, 10 Jul 2012 09:17:11 -0400 Received: from mx1.redhat.com ([209.132.183.28]:47869) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SoaJI-0001az-5Q for qemu-devel@nongnu.org; Tue, 10 Jul 2012 09:17:00 -0400 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id q6ADGaQh031481 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Tue, 10 Jul 2012 09:16:36 -0400 Received: from dell-pet610-01.lab.eng.brq.redhat.com (dell-pet610-01.lab.eng.brq.redhat.com [10.34.42.20]) by int-mx10.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id q6ADGR9C016813; Tue, 10 Jul 2012 09:16:33 -0400 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Tue, 10 Jul 2012 15:15:52 +0200 Message-Id: <1341926152-541-3-git-send-email-imammedo@redhat.com> In-Reply-To: <1341926152-541-1-git-send-email-imammedo@redhat.com> References: <1341926152-541-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.23 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.132.183.28 Cc: aliguori@us.ibm.com, ehabkost@redhat.com, jan.kiszka@siemens.com, mtosatti@redhat.com, mdroth@linux.vnet.ibm.com, blauwirbel@gmail.com, avi@redhat.com, pbonzini@redhat.com, afaerber@suse.de Subject: [Qemu-devel] [PATCH 2/2] target-i386: move cpu_reset and reset callback to cpu.c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Moving reset callback into cpu object from board level and resetting cpu at the end of x86_cpu_realize() will allow properly create cpu object during run-time (hotplug) without calling reset exteraly. When reset over QOM hierarchy is implemented, reset callback should be removed. v2: leave cpu_reset in pc_new_cpu() for now, it's to be cleaned up when APIC init is moved in cpu.c Signed-off-by: Igor Mammedov --- hw/pc.c | 9 +-------- target-i386/cpu.c | 16 ++++++++++++++++ 2 files changed, 17 insertions(+), 8 deletions(-) diff --git a/hw/pc.c b/hw/pc.c index 50c1715..d74ca6e 100644 --- a/hw/pc.c +++ b/hw/pc.c @@ -918,12 +918,6 @@ void pc_acpi_smi_interrupt(void *opaque, int irq, int level) } } -static void pc_cpu_reset(void *opaque) -{ - X86CPU *cpu = opaque; - cpu_reset(CPU(cpu)); -} - static X86CPU *pc_new_cpu(const char *cpu_model) { X86CPU *cpu; @@ -938,8 +932,7 @@ static X86CPU *pc_new_cpu(const char *cpu_model) if ((env->cpuid_features & CPUID_APIC) || smp_cpus > 1) { env->apic_state = apic_init(env, env->cpuid_apic_id); } - qemu_register_reset(pc_cpu_reset, cpu); - pc_cpu_reset(cpu); + cpu_reset(CPU(cpu)); return cpu; } diff --git a/target-i386/cpu.c b/target-i386/cpu.c index f9ed6d8..65c7446 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -31,6 +31,8 @@ #include "hyperv.h" +#include "hw/hw.h" + /* feature flags taken from "Intel Processor Identification and the CPUID * Instruction" and AMD's "CPUID Specification". In cases of disagreement * between feature naming conventions, aliases may be added. @@ -1697,6 +1699,15 @@ static void x86_cpu_reset(CPUState *s) #endif } +#ifndef CONFIG_USER_ONLY +/* TODO: remove me, when reset over QOM tree is implemented */ +static void x86_cpu_machine_reset_cb(void *opaque) +{ + X86CPU *cpu = opaque; + cpu_reset(CPU(cpu)); +} +#endif + static void mce_init(X86CPU *cpu) { CPUX86State *cenv = &cpu->env; @@ -1717,8 +1728,13 @@ void x86_cpu_realize(Object *obj, Error **errp) { X86CPU *cpu = X86_CPU(obj); +#ifndef CONFIG_USER_ONLY + qemu_register_reset(x86_cpu_machine_reset_cb, cpu); +#endif + mce_init(cpu); qemu_init_vcpu(&cpu->env); + cpu_reset(CPU(cpu)); } static void x86_cpu_initfn(Object *obj)