@@ -88,6 +88,7 @@ libobj-$(TARGET_SPARC64) += vis_helper.o
libobj-$(CONFIG_NEED_MMU) += mmu.o
libobj-$(TARGET_ARM) += neon_helper.o iwmmxt_helper.o
libobj-$(TARGET_ARM) += cpu.o
+libobj-$(TARGET_SH4) += cpu.o
ifeq ($(TARGET_BASE_ARCH), sparc)
libobj-y += fop_helper.o cc_helper.o win_helper.o mmu_helper.o ldst_helper.o
libobj-y += cpu_init.o
new file mode 100644
@@ -0,0 +1,78 @@
+/*
+ * QEMU SuperH CPU
+ *
+ * Copyright (c) 2012 SUSE LINUX Products GmbH
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Library General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Library General Public License for more details.
+ *
+ * You should have received a copy of the GNU Library General Public
+ * License along with this library; if not, see
+ * <http://www.gnu.org/licenses/lgpl-2.1.html>
+ */
+#ifndef QEMU_SUPERH_CPU_QOM_H
+#define QEMU_SUPERH_CPU_QOM_H
+
+#include "qemu-common.h"
+#include "qemu/cpu.h"
+#include "cpu.h"
+
+#define TYPE_SUPERH_CPU "superh-cpu"
+
+#define SUPERH_CPU_CLASS(klass) \
+ OBJECT_CLASS_CHECK(SuperHCPUClass, (klass), TYPE_SUPERH_CPU)
+#define SUPERH_CPU(obj) \
+ OBJECT_CHECK(SuperHCPU, (obj), TYPE_SUPERH_CPU)
+#define SUPERH_CPU_GET_CLASS(obj) \
+ OBJECT_GET_CLASS(SuperHCPUClass, (obj), TYPE_SUPERH_CPU)
+
+/**
+ * SuperHCPUClass:
+ * @parent_reset: The parent class' reset handler.
+ *
+ * A SuperH CPU model.
+ */
+typedef struct SuperHCPUClass {
+ /*< private >*/
+ CPUClass parent_class;
+ /*< public >*/
+
+ void (*parent_reset)(CPUState *cpu);
+
+ int id;
+ uint32_t pvr;
+ uint32_t prr;
+ uint32_t cvr;
+ uint32_t features;
+} SuperHCPUClass;
+
+/**
+ * SuperHCPU:
+ * @env: Legacy CPU state.
+ *
+ * A SuperH CPU.
+ */
+typedef struct SuperHCPU {
+ /*< private >*/
+ CPUState parent_obj;
+ /*< public >*/
+
+ CPUSH4State env;
+} SuperHCPU;
+
+static inline SuperHCPU *sh_env_get_cpu(CPUSH4State *env)
+{
+ return SUPERH_CPU(container_of(env, SuperHCPU, env));
+}
+
+#define ENV_GET_CPU(e) CPU(sh_env_get_cpu(e))
+
+
+#endif
new file mode 100644
@@ -0,0 +1,161 @@
+/*
+ * QEMU SuperH CPU
+ *
+ * Copyright (c) 2005 Samuel Tardieu
+ * Copyright (c) 2012 SUSE LINUX Products GmbH
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Library General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Library General Public License for more details.
+ *
+ * You should have received a copy of the GNU Library General Public
+ * License along with this library; if not, see
+ * <http://www.gnu.org/licenses/lgpl-2.1.html>
+ */
+
+#include "cpu-qom.h"
+#include "qemu-common.h"
+
+static void superh_cpu_reset(CPUState *c)
+{
+ SuperHCPU *cpu = SUPERH_CPU(c);
+ SuperHCPUClass *klass = SUPERH_CPU_GET_CLASS(cpu);
+ CPUSH4State *env = &cpu->env;
+
+ if (qemu_loglevel_mask(CPU_LOG_RESET)) {
+ qemu_log("CPU Reset (CPU %d)\n", env->cpu_index);
+ log_cpu_state(env, 0);
+ }
+
+ klass->parent_reset(c);
+
+ memset(env, 0, offsetof(CPUSH4State, breakpoints));
+ tlb_flush(env, 1);
+
+ env->pc = 0xA0000000;
+#if defined(CONFIG_USER_ONLY)
+ env->fpscr = FPSCR_PR; /* value for userspace according to the kernel */
+ set_float_rounding_mode(float_round_nearest_even, &env->fp_status); /* ?! */
+#else
+ env->sr = SR_MD | SR_RB | SR_BL | SR_I3 | SR_I2 | SR_I1 | SR_I0;
+ env->fpscr = FPSCR_DN | FPSCR_RM_ZERO; /* CPU reset value according to
+ SH4 manual */
+ set_float_rounding_mode(float_round_to_zero, &env->fp_status);
+ set_flush_to_zero(1, &env->fp_status);
+#endif
+ set_default_nan_mode(1, &env->fp_status);
+}
+
+/* CPU models */
+
+typedef struct {
+ const char *name;
+ int id;
+ uint32_t pvr;
+ uint32_t prr;
+ uint32_t cvr;
+ uint32_t features;
+} SuperHCPUInfo;
+
+static const SuperHCPUInfo superh_cpus[] = {
+ {
+ .name = "SH7750R",
+ .id = SH_CPU_SH7750R,
+ .pvr = 0x00050000,
+ .prr = 0x00000100,
+ .cvr = 0x00110000,
+ .features = SH_FEATURE_BCR3_AND_BCR4,
+ }, {
+ .name = "SH7751R",
+ .id = SH_CPU_SH7751R,
+ .pvr = 0x04050005,
+ .prr = 0x00000113,
+ .cvr = 0x00110000, /* Neutered caches, should be 0x20480000 */
+ .features = SH_FEATURE_BCR3_AND_BCR4,
+ }, {
+ .name = "SH7785",
+ .id = SH_CPU_SH7785,
+ .pvr = 0x10300700,
+ .prr = 0x00000200,
+ .cvr = 0x71440211,
+ .features = SH_FEATURE_SH4A,
+ },
+};
+
+static void superh_cpu_initfn(Object *obj)
+{
+ SuperHCPU *cpu = SUPERH_CPU(obj);
+ SuperHCPUClass *klass = SUPERH_CPU_GET_CLASS(cpu);
+ CPUSH4State *env = &cpu->env;
+
+ memset(env, 0, sizeof(CPUSH4State));
+ env->cpu_model_str = object_get_typename(obj);
+ cpu_exec_init(env);
+
+ env->id = klass->id;
+ env->pvr = klass->pvr;
+ env->prr = klass->prr;
+ env->cvr = klass->cvr;
+ env->features = klass->features;
+
+ env->movcal_backup_tail = &(env->movcal_backup);
+
+ cpu_reset(CPU(cpu));
+}
+
+static void superh_cpu_class_init(ObjectClass *klass, void *data)
+{
+ CPUClass *cpu_class = CPU_CLASS(klass);
+ SuperHCPUClass *k = SUPERH_CPU_CLASS(klass);
+ const SuperHCPUInfo *info = data;
+
+ k->parent_reset = cpu_class->reset;
+ cpu_class->reset = superh_cpu_reset;
+
+ k->id = info->id;
+ k->pvr = info->pvr;
+ k->prr = info->prr;
+ k->cvr = info->cvr;
+ k->features = info->features;
+}
+
+static void cpu_register(const SuperHCPUInfo *info)
+{
+ TypeInfo type = {
+ .name = info->name,
+ .parent = TYPE_SUPERH_CPU,
+ .instance_size = sizeof(SuperHCPU),
+ .instance_init = superh_cpu_initfn,
+ .class_size = sizeof(SuperHCPUClass),
+ .class_init = superh_cpu_class_init,
+ .class_data = (void *)info,
+ };
+
+ type_register_static(&type);
+}
+
+static const TypeInfo superh_cpu_type_info = {
+ .name = TYPE_SUPERH_CPU,
+ .parent = TYPE_CPU,
+ .instance_size = sizeof(SuperHCPU),
+ .abstract = true,
+ .class_size = sizeof(SuperHCPUClass),
+};
+
+static void superh_cpu_register_types(void)
+{
+ int i;
+
+ type_register_static(&superh_cpu_type_info);
+ for (i = 0; i < ARRAY_SIZE(superh_cpus); i++) {
+ cpu_register(&superh_cpus[i]);
+ }
+}
+
+type_init(superh_cpu_register_types)
@@ -255,6 +255,7 @@ static inline void cpu_clone_regs(CPUSH4State *env, target_ulong newsp)
#endif
#include "cpu-all.h"
+#include "cpu-qom.h"
/* Memory access type */
enum {
@@ -180,107 +180,62 @@ void cpu_dump_state(CPUSH4State * env, FILE * f,
void cpu_state_reset(CPUSH4State *env)
{
- if (qemu_loglevel_mask(CPU_LOG_RESET)) {
- qemu_log("CPU Reset (CPU %d)\n", env->cpu_index);
- log_cpu_state(env, 0);
- }
-
- memset(env, 0, offsetof(CPUSH4State, breakpoints));
- tlb_flush(env, 1);
-
- env->pc = 0xA0000000;
-#if defined(CONFIG_USER_ONLY)
- env->fpscr = FPSCR_PR; /* value for userspace according to the kernel */
- set_float_rounding_mode(float_round_nearest_even, &env->fp_status); /* ?! */
-#else
- env->sr = SR_MD | SR_RB | SR_BL | SR_I3 | SR_I2 | SR_I1 | SR_I0;
- env->fpscr = FPSCR_DN | FPSCR_RM_ZERO; /* CPU reset value according to SH4 manual */
- set_float_rounding_mode(float_round_to_zero, &env->fp_status);
- set_flush_to_zero(1, &env->fp_status);
-#endif
- set_default_nan_mode(1, &env->fp_status);
+ cpu_reset(ENV_GET_CPU(env));
}
-typedef struct {
- const char *name;
- int id;
- uint32_t pvr;
- uint32_t prr;
- uint32_t cvr;
- uint32_t features;
-} sh4_def_t;
-
-static sh4_def_t sh4_defs[] = {
- {
- .name = "SH7750R",
- .id = SH_CPU_SH7750R,
- .pvr = 0x00050000,
- .prr = 0x00000100,
- .cvr = 0x00110000,
- .features = SH_FEATURE_BCR3_AND_BCR4,
- }, {
- .name = "SH7751R",
- .id = SH_CPU_SH7751R,
- .pvr = 0x04050005,
- .prr = 0x00000113,
- .cvr = 0x00110000, /* Neutered caches, should be 0x20480000 */
- .features = SH_FEATURE_BCR3_AND_BCR4,
- }, {
- .name = "SH7785",
- .id = SH_CPU_SH7785,
- .pvr = 0x10300700,
- .prr = 0x00000200,
- .cvr = 0x71440211,
- .features = SH_FEATURE_SH4A,
- },
-};
+typedef struct SuperHCPUListState {
+ fprintf_function cpu_fprintf;
+ FILE *file;
+} SuperHCPUListState;
-static const sh4_def_t *cpu_sh4_find_by_name(const char *name)
+static gint sh_cpu_list_compare(gconstpointer a, gconstpointer b)
{
- int i;
-
- if (strcasecmp(name, "any") == 0)
- return &sh4_defs[0];
+ ObjectClass *class_a = (ObjectClass *)a;
+ ObjectClass *class_b = (ObjectClass *)b;
- for (i = 0; i < ARRAY_SIZE(sh4_defs); i++)
- if (strcasecmp(name, sh4_defs[i].name) == 0)
- return &sh4_defs[i];
-
- return NULL;
+ return strcasecmp(object_class_get_name(class_a),
+ object_class_get_name(class_b));
}
-void sh4_cpu_list(FILE *f, fprintf_function cpu_fprintf)
+static void sh_cpu_list_entry(gpointer data, gpointer user_data)
{
- int i;
+ ObjectClass *klass = data;
+ SuperHCPUListState *s = user_data;
- for (i = 0; i < ARRAY_SIZE(sh4_defs); i++)
- (*cpu_fprintf)(f, "%s\n", sh4_defs[i].name);
+ (*s->cpu_fprintf)(s->file, "%s\n",
+ object_class_get_name(klass));
}
-static void cpu_register(CPUSH4State *env, const sh4_def_t *def)
+void sh4_cpu_list(FILE *f, fprintf_function cpu_fprintf)
{
- env->pvr = def->pvr;
- env->prr = def->prr;
- env->cvr = def->cvr;
- env->id = def->id;
+ SuperHCPUListState s = {
+ .cpu_fprintf = cpu_fprintf,
+ .file = f,
+ };
+ GSList *list;
+
+ list = object_class_get_list(TYPE_SUPERH_CPU, false);
+ list = g_slist_sort(list, sh_cpu_list_compare);
+ g_slist_foreach(list, sh_cpu_list_entry, &s);
+ g_slist_free(list);
}
CPUSH4State *cpu_sh4_init(const char *cpu_model)
{
+ SuperHCPU *cpu;
CPUSH4State *env;
- const sh4_def_t *def;
- def = cpu_sh4_find_by_name(cpu_model);
- if (!def)
- return NULL;
- env = g_malloc0(sizeof(CPUSH4State));
- env->features = def->features;
- cpu_exec_init(env);
- env->movcal_backup_tail = &(env->movcal_backup);
+ if (strcasecmp(cpu_model, "any") == 0) {
+ cpu_model = "SH7750R";
+ }
+ if (object_class_by_name(cpu_model) == NULL) {
+ return NULL;
+ }
+ cpu = SUPERH_CPU(object_new(cpu_model));
+ env = &cpu->env;
+
sh4_translate_init();
- env->cpu_model_str = cpu_model;
- cpu_state_reset(env);
- cpu_register(env, def);
+
qemu_init_vcpu(env);
return env;
}
Embed CPUSH4State into SuperHCPU. Let cpu_state_reset() call cpu_reset(). Let sh4_cpu_list() enumerate CPU classes alphabetically. Signed-off-by: Andreas Färber <afaerber@suse.de> --- Makefile.target | 1 + target-sh4/cpu-qom.h | 78 +++++++++++++++++++++++ target-sh4/cpu.c | 161 ++++++++++++++++++++++++++++++++++++++++++++++++ target-sh4/cpu.h | 1 + target-sh4/translate.c | 119 +++++++++++------------------------ 5 files changed, 278 insertions(+), 82 deletions(-) create mode 100644 target-sh4/cpu-qom.h create mode 100644 target-sh4/cpu.c