@@ -406,11 +406,6 @@ void cpu_arm_set_cp_io(CPUARMState *env, int cpnum,
#define ARM_CPUID_ARM926 0x41069265
#define ARM_CPUID_TI915T 0x54029152
#define ARM_CPUID_TI925T 0x54029252
-#define ARM_CPUID_PXA250 0x69052100
-#define ARM_CPUID_PXA255 0x69052d00
-#define ARM_CPUID_PXA260 0x69052903
-#define ARM_CPUID_PXA261 0x69052d05
-#define ARM_CPUID_PXA262 0x69052d06
#define ARM_CPUID_PXA270_A0 0x69054110
#define ARM_CPUID_PXA270_A1 0x69054111
#define ARM_CPUID_PXA270_B0 0x69054112
@@ -71,20 +71,12 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
env->cp15.c15_i_max = 0x000;
env->cp15.c15_i_min = 0xff0;
break;
- case ARM_CPUID_PXA250:
- case ARM_CPUID_PXA255:
- case ARM_CPUID_PXA260:
- case ARM_CPUID_PXA261:
- case ARM_CPUID_PXA262:
- /* JTAG_ID is ((id << 28) | 0x09265013) */
- break;
case ARM_CPUID_PXA270_A0:
case ARM_CPUID_PXA270_A1:
case ARM_CPUID_PXA270_B0:
case ARM_CPUID_PXA270_B1:
case ARM_CPUID_PXA270_C0:
case ARM_CPUID_PXA270_C5:
- /* JTAG_ID is ((id << 28) | 0x09265013) */
env->iwmmxt.cregs[ARM_IWMMXT_wCID] = 0x69051000 | 'Q';
break;
default:
None of the machines in QEMU offer a JTAG debug interface, so this info was unused. Further, the PXA250 ID contradicts the February 2002 Developer's Manual, which has it as 0xn9264013 with n the MIDR Revision. Signed-off-by: Andreas Färber <afaerber@suse.de> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Andrzej Zaborowski <balrogg@gmail.com> --- target-arm/cpu.h | 5 ----- target-arm/helper.c | 8 -------- 2 files changed, 0 insertions(+), 13 deletions(-)