From patchwork Sat Nov 5 11:23:57 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jean-Christophe Dubois X-Patchwork-Id: 123835 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 0E4DFB6FA6 for ; Sat, 5 Nov 2011 22:26:55 +1100 (EST) Received: from localhost ([::1]:40479 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RMeOZ-0001BC-V1 for incoming@patchwork.ozlabs.org; Sat, 05 Nov 2011 07:26:43 -0400 Received: from eggs.gnu.org ([140.186.70.92]:55451) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RMeOT-0001B7-LI for qemu-devel@nongnu.org; Sat, 05 Nov 2011 07:26:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RMeOS-0006PY-6X for qemu-devel@nongnu.org; Sat, 05 Nov 2011 07:26:37 -0400 Received: from smtp4-g21.free.fr ([212.27.42.4]:52471) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RMeOR-0006PS-HS for qemu-devel@nongnu.org; Sat, 05 Nov 2011 07:26:36 -0400 Received: from localhost.localdomain (unknown [78.235.240.156]) by smtp4-g21.free.fr (Postfix) with ESMTP id 997D44C8229; Sat, 5 Nov 2011 12:26:27 +0100 (CET) From: Jean-Christophe DUBOIS To: qemu-devel@nongnu.org Date: Sat, 5 Nov 2011 12:23:57 +0100 Message-Id: <1320492237-3637-1-git-send-email-jcd@tribudubois.net> X-Mailer: git-send-email 1.7.5.4 MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 3) X-Received-From: 212.27.42.4 Cc: peter.maydell@linaro.org, paul@codesourcery.com, Jean-Christophe DUBOIS Subject: [Qemu-devel] [PATCH v2] realview: fix reset bit depending on platform X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Depending on the considered baseboard the bit used to reset the platform is different. Here is the list of considered Realview/Versatile platforms: Realview/Versatile AB for ARM926EJ-S: BOARD_ID = 0x100 = BOARD_ID_PB926 http://infocenter.arm.com/help/topic/com.arm.doc.dui0225d/CACCIFGI.html RealView Emulation Baseboard: BOARD_ID = 0x140 = BOARD_ID_EB No reset register RealView PB for ARM1176JZF-S: BOARD_ID = 0x147 = BOARD_ID_PB1176 http://infocenter.arm.com/help/topic/com.arm.doc.dui0425f/Caccifgi.html RealView PB for ARM11 MPCore: BOARD_ID = 0x159 = BOARD_ID_PB11MP http://infocenter.arm.com/help/topic/com.arm.doc.dui0351e/CACCHBFB.html RealView PB for Cortex-A8: BOARD_ID = 0x178 = BOARD_ID_PBA8 http://infocenter.arm.com/help/topic/com.arm.doc.dui0417d/BBACIGAD.html RealView PB for Cortex-A9: BOARD_ID = 0x182 = BOARD_ID_PBX http://infocenter.arm.com/help/topic/com.arm.doc.dui0440b/CACCHBFB.html Motherboard Express µATX: BOARD_ID = 0x190 = BOARD_ID_VEXPRESS No reset register v2: - Add multiple boards support - fix coding style - Added a BOARD_ID descriptor for unsupported baseboards. Signed-off-by: Jean-Christophe DUBOIS --- hw/arm_sysctl.c | 43 ++++++++++++++++++++++++++++++++----------- 1 files changed, 32 insertions(+), 11 deletions(-) diff --git a/hw/arm_sysctl.c b/hw/arm_sysctl.c index 17cf6f7..8f07fd5 100644 --- a/hw/arm_sysctl.c +++ b/hw/arm_sysctl.c @@ -63,6 +63,8 @@ static const VMStateDescription vmstate_arm_sysctl = { */ #define BOARD_ID_PB926 0x100 #define BOARD_ID_EB 0x140 +#define BOARD_ID_PB1176 0x147 +#define BOARD_ID_PB11MP 0x159 #define BOARD_ID_PBA8 0x178 #define BOARD_ID_PBX 0x182 #define BOARD_ID_VEXPRESS 0x190 @@ -143,7 +145,8 @@ static uint64_t arm_sysctl_read(void *opaque, target_phys_addr_t offset, case 0x58: /* BOOTCS */ return 0; case 0x5c: /* 24MHz */ - return muldiv64(qemu_get_clock_ns(vm_clock), 24000000, get_ticks_per_sec()); + return muldiv64(qemu_get_clock_ns(vm_clock), 24000000, + get_ticks_per_sec()); case 0x60: /* MISC */ return 0; case 0x84: /* PROCID0 */ @@ -184,7 +187,7 @@ static uint64_t arm_sysctl_read(void *opaque, target_phys_addr_t offset, return s->sys_cfgstat; default: bad_reg: - printf ("arm_sysctl_read: Bad register offset 0x%x\n", (int)offset); + printf("arm_sysctl_read: Bad register offset 0x%x\n", (int)offset); return 0; } } @@ -205,10 +208,11 @@ static void arm_sysctl_write(void *opaque, target_phys_addr_t offset, /* ??? */ break; case 0x20: /* LOCK */ - if (val == LOCK_VALUE) + if (val == LOCK_VALUE) { s->lockval = val; - else + } else { s->lockval = val & 0x7fff; + } break; case 0x28: /* CFGDATA1 */ /* ??? Need to implement this. */ @@ -231,15 +235,32 @@ static void arm_sysctl_write(void *opaque, target_phys_addr_t offset, s->nvflags &= ~val; break; case 0x40: /* RESETCTL */ - if (board_id(s) == BOARD_ID_VEXPRESS) { + switch (board_id(s)) { + case BOARD_ID_PB926: + case BOARD_ID_PB1176: + if (s->lockval == LOCK_VALUE) { + s->resetlevel = val; + if (val & 0x100) { + qemu_system_reset_request(); + } + } + break; + case BOARD_ID_PBX: + case BOARD_ID_PBA8: + case BOARD_ID_PB11MP: + if (s->lockval == LOCK_VALUE) { + s->resetlevel = val; + if (val & 0x04) { + qemu_system_reset_request(); + } + } + break; + case BOARD_ID_VEXPRESS: + case BOARD_ID_EB: + default: /* reserved: RAZ/WI */ break; } - if (s->lockval == LOCK_VALUE) { - s->resetlevel = val; - if (val & 0x100) - qemu_system_reset_request (); - } break; case 0x44: /* PCICTL */ /* nothing to do. */ @@ -324,7 +345,7 @@ static void arm_sysctl_write(void *opaque, target_phys_addr_t offset, return; default: bad_reg: - printf ("arm_sysctl_write: Bad register offset 0x%x\n", (int)offset); + printf("arm_sysctl_write: Bad register offset 0x%x\n", (int)offset); return; } }