[RFC128,3/2] Adjust system and pci address spaces to full 64-bit

Now that the memory API supports full 64-bit buses, adjust the relevant
callers to take advantage of it.

Signed-off-by: Avi Kivity <avi@redhat.com>
---

Note needs slight adjustment to patch 2 to make 'info mtree' work.

 exec.c          |    2 +-
 hw/pc_piix.c    |    2 +-
 hw/pci_bridge.c |    2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

On Sun, Oct 16, 2011 at 05:29:07PM +0200, Avi Kivity wrote:
> Now that the memory API supports full 64-bit buses, adjust the relevant
> callers to take advantage of it.

Note that this doesn't, strictly speaking doesn't give you full 64-bit
coverage, since the range covered is 2^64-1 bytes rather than 2^64
bytes.  Cases where that will matter would be very rare, of course.


> Signed-off-by: Avi Kivity <avi@redhat.com>
> ---
> 
> Note needs slight adjustment to patch 2 to make 'info mtree' work.
> 
>  exec.c          |    2 +-
>  hw/pc_piix.c    |    2 +-
>  hw/pci_bridge.c |    2 +-
>  3 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/exec.c b/exec.c
> index d0cbf15..16e37a7 100644
> --- a/exec.c
> +++ b/exec.c
> @@ -3825,7 +3825,7 @@ static void io_mem_init(void)
>  static void memory_map_init(void)
>  {
>      system_memory = g_malloc(sizeof(*system_memory));
> -    memory_region_init(system_memory, "system", INT64_MAX);
> +    memory_region_init(system_memory, "system", UINT64_MAX);
>      set_system_memory_map(system_memory);
>  
>      system_io = g_malloc(sizeof(*system_io));
> diff --git a/hw/pc_piix.c b/hw/pc_piix.c
> index ce1c87f..45540e5 100644
> --- a/hw/pc_piix.c
> +++ b/hw/pc_piix.c
> @@ -115,7 +115,7 @@ static void pc_init1(MemoryRegion *system_memory,
>  
>      if (pci_enabled) {
>          pci_memory = g_new(MemoryRegion, 1);
> -        memory_region_init(pci_memory, "pci", INT64_MAX);
> +        memory_region_init(pci_memory, "pci", UINT64_MAX);
>          rom_memory = pci_memory;
>      } else {
>          pci_memory = NULL;
> diff --git a/hw/pci_bridge.c b/hw/pci_bridge.c
> index b6287cd..3b786aa 100644
> --- a/hw/pci_bridge.c
> +++ b/hw/pci_bridge.c
> @@ -319,7 +319,7 @@ int pci_bridge_initfn(PCIDevice *dev)
>      sec_bus->parent_dev = dev;
>      sec_bus->map_irq = br->map_irq;
>      sec_bus->address_space_mem = &br->address_space_mem;
> -    memory_region_init(&br->address_space_mem, "pci_pridge_pci", INT64_MAX);
> +    memory_region_init(&br->address_space_mem, "pci_pridge_pci", UINT64_MAX);
>      sec_bus->address_space_io = &br->address_space_io;
>      memory_region_init(&br->address_space_io, "pci_bridge_io", 65536);
>      pci_bridge_region_init(br);

On 10/17/2011 07:33 AM, David Gibson wrote:
> On Sun, Oct 16, 2011 at 05:29:07PM +0200, Avi Kivity wrote:
> > Now that the memory API supports full 64-bit buses, adjust the relevant
> > callers to take advantage of it.
>
> Note that this doesn't, strictly speaking doesn't give you full 64-bit
> coverage, since the range covered is 2^64-1 bytes rather than 2^64
> bytes.  Cases where that will matter would be very rare, of course.
>

An undocumented and indeed unmentioned feature of patch 2 is that
UINT64_MAX sizes are expanded to UINT64_MAX+1.  I did that to avoid
introducing memory_region_init_128() (or perhaps
memory_region_init_2_64() that doesn't take a size argument).  That
removes the ability to create container regions that span exactly
UINT64_MAX bytes.  It is strange in a patchset that tries to makes
things more regular, I admit.