diff --git a/Makefile.target b/Makefile.target
index 602d50d..3c99bf8 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -258,7 +258,7 @@ endif
 obj-ppc-y += ppc4xx_devs.o ppc4xx_pci.o ppc405_uc.o ppc405_boards.o
 obj-ppc-y += ppc440.o ppc440_bamboo.o
 # PowerPC E500 boards
-obj-ppc-y += ppce500_mpc8544ds.o
+obj-ppc-y += ppce500_mpc8544ds.o ppce500_util.o
 # PowerPC 440 Xilinx ML507 reference board.
 obj-ppc-y += virtex_ml507.o
 obj-ppc-$(CONFIG_KVM) += kvm_ppc.o
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index 6b57fbf..8bcce15 100644
--- a/hw/ppce500_mpc8544ds.c
+++ b/hw/ppce500_mpc8544ds.c
@@ -50,6 +50,7 @@
 #define MPC8544_PCI_REGS_SIZE      0x1000
 #define MPC8544_PCI_IO             0xE1000000
 #define MPC8544_PCI_IOLEN          0x10000
+#define MPC8544_UTIL_BASE          (MPC8544_CCSRBAR_BASE + 0xe0000)
 
 struct boot_info
 {
@@ -270,6 +271,9 @@ static void mpc8544ds_init(ram_addr_t ram_size,
                        serial_hds[0], 1, 1);
     }
 
+    /* General Utility device */
+    sysbus_create_simple("e500-util", MPC8544_UTIL_BASE, NULL);
+
     /* PCI */
     dev = sysbus_create_varargs("e500-pcihost", MPC8544_PCI_REGS_BASE,
                                 mpic[pci_irq_nrs[0]], mpic[pci_irq_nrs[1]],
diff --git a/hw/ppce500_util.c b/hw/ppce500_util.c
new file mode 100644
index 0000000..4440c21
--- /dev/null
+++ b/hw/ppce500_util.c
@@ -0,0 +1,94 @@
+/*
+ * QEMU PowerPC E500 global util pseudo-device
+ *
+ * Copyright (C) 2011 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * Author: Alexander Graf, <alex@csgraf.de>
+ *
+ * This is free software; you can redistribute it and/or modify
+ * it under the terms of  the GNU General  Public License as published by
+ * the Free Software Foundation;  either version 2 of the  License, or
+ * (at your option) any later version.
+ */
+
+#include "hw.h"
+#include "sysemu.h"
+#include "sysbus.h"
+
+#define E500_UTIL_MMIO_SIZE        0x1000
+#define E500_UTIL_ADDR_RSTCR       0xb0
+#define E500_UTIL_RSTCR_RESET      0x02
+
+struct PPCE500UtilState {
+    SysBusDevice busdev;
+    int mmio_map;
+};
+
+typedef struct PPCE500UtilState PPCE500UtilState;
+
+static uint32_t e500_util_read32(void *opaque, target_phys_addr_t addr)
+{
+    uint32_t value = 0;
+
+    addr &= 0xfff;
+    switch (addr) {
+    default:
+        break;
+    }
+
+    return value;
+}
+
+static CPUReadMemoryFunc * const e500_util_read[] = {
+    NULL,
+    NULL,
+    &e500_util_read32,
+};
+
+static void e500_util_write32(void *opaque, target_phys_addr_t addr,
+                              uint32_t value)
+{
+    addr &= 0xfff;
+
+    switch (addr) {
+    case E500_UTIL_ADDR_RSTCR:
+        if (value & E500_UTIL_RSTCR_RESET) {
+            qemu_system_reset_request();
+        }
+        break;
+    default:
+        break;
+    }
+}
+
+static CPUWriteMemoryFunc * const e500_util_write[] = {
+    NULL,
+    NULL,
+    &e500_util_write32,
+};
+
+static int e500_util_initfn(SysBusDevice *dev)
+{
+    PPCE500UtilState *s;
+    int iomem;
+
+    s = FROM_SYSBUS(PPCE500UtilState, sysbus_from_qdev(dev));
+
+    iomem = cpu_register_io_memory(e500_util_read, e500_util_write, s,
+                                   DEVICE_BIG_ENDIAN);
+    sysbus_init_mmio(dev, E500_UTIL_MMIO_SIZE, iomem);
+
+    return 0;
+}
+
+static SysBusDeviceInfo e500_util_info = {
+    .init         = e500_util_initfn,
+    .qdev.name    = "e500-util",
+    .qdev.size    = sizeof(PPCE500UtilState),
+};
+
+static void e500_pci_register(void)
+{
+    sysbus_register_withprop(&e500_util_info);
+}
+device_init(e500_pci_register);
diff --git a/pc-bios/mpc8544ds.dtb b/pc-bios/mpc8544ds.dtb
index 3299546696bf21f53f8ce2c9eba7fcb740c547da..9a1eba0019ca6eada134650fb0866342fa0066e3 100644
GIT binary patch
diff --git a/pc-bios/mpc8544ds.dts b/pc-bios/mpc8544ds.dts
index 872152d..9b95bfd 100644
--- a/pc-bios/mpc8544ds.dts
+++ b/pc-bios/mpc8544ds.dts
@@ -82,6 +82,12 @@
 			compatible = "chrp,open-pic";
 			device_type = "open-pic";
 		};
+
+                global-utilities@e0000 {        //global utilities block
+                        compatible = "fsl,mpc8548-guts";
+                        reg = <0xe0000 0x1000>;
+                        fsl,has-rstcr;
+                };
 	};
 
 	pci0: pci@e0008000 {
