From patchwork Sun May 8 16:04:59 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Hajnoczi X-Patchwork-Id: 94568 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 8B17DB7149 for ; Mon, 9 May 2011 02:06:34 +1000 (EST) Received: from localhost ([::1]:55929 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QJ6V5-0006I1-Bh for incoming@patchwork.ozlabs.org; Sun, 08 May 2011 12:06:31 -0400 Received: from eggs.gnu.org ([140.186.70.92]:51815) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QJ6UZ-0006HC-QO for qemu-devel@nongnu.org; Sun, 08 May 2011 12:06:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QJ6UY-0007SP-Po for qemu-devel@nongnu.org; Sun, 08 May 2011 12:05:59 -0400 Received: from mtagate2.uk.ibm.com ([194.196.100.162]:33937) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QJ6UY-0007Rm-HT for qemu-devel@nongnu.org; Sun, 08 May 2011 12:05:58 -0400 Received: from d06nrmr1806.portsmouth.uk.ibm.com (d06nrmr1806.portsmouth.uk.ibm.com [9.149.39.193]) by mtagate2.uk.ibm.com (8.13.1/8.13.1) with ESMTP id p48G5utm018323 for ; Sun, 8 May 2011 16:05:56 GMT Received: from d06av11.portsmouth.uk.ibm.com (d06av11.portsmouth.uk.ibm.com [9.149.37.252]) by d06nrmr1806.portsmouth.uk.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id p48G7CT72470106 for ; Sun, 8 May 2011 17:07:12 +0100 Received: from d06av11.portsmouth.uk.ibm.com (loopback [127.0.0.1]) by d06av11.portsmouth.uk.ibm.com (8.14.4/8.13.1/NCO v10.0 AVout) with ESMTP id p48G5umx021565 for ; Sun, 8 May 2011 10:05:56 -0600 Received: from stefanha-thinkpad.ibm.com (sig-9-146-157-45.uk.ibm.com [9.146.157.45]) by d06av11.portsmouth.uk.ibm.com (8.14.4/8.13.1/NCO v10.0 AVin) with ESMTP id p48G5njV021096; Sun, 8 May 2011 10:05:55 -0600 From: Stefan Hajnoczi To: Anthony Liguori Date: Sun, 8 May 2011 17:04:59 +0100 Message-Id: <1304870719-20885-5-git-send-email-stefanha@linux.vnet.ibm.com> X-Mailer: git-send-email 1.7.4.4 In-Reply-To: <1304870719-20885-1-git-send-email-stefanha@linux.vnet.ibm.com> References: <1304870719-20885-1-git-send-email-stefanha@linux.vnet.ibm.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6, seldom 2.4 (older, 4) X-Received-From: 194.196.100.162 Cc: qemu-devel@nongnu.org, Stefan Hajnoczi Subject: [Qemu-devel] [PATCH 04/24] Fix typos in comments (accessable -> accessible, priveleged -> privileged) X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Stefan Weil Signed-off-by: Stefan Weil Signed-off-by: Stefan Hajnoczi --- hw/sh7750_regs.h | 6 +++--- target-cris/cpu.h | 2 +- tests/test-mmap.c | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/hw/sh7750_regs.h b/hw/sh7750_regs.h index 5a23a2c..6ec13ab 100644 --- a/hw/sh7750_regs.h +++ b/hw/sh7750_regs.h @@ -23,9 +23,9 @@ * All register has 2 addresses: in 0xff000000 - 0xffffffff (P4 address) and * in 0x1f000000 - 0x1fffffff (area 7 address) */ -#define SH7750_P4_BASE 0xff000000 /* Accessable only in - priveleged mode */ -#define SH7750_A7_BASE 0x1f000000 /* Accessable only using TLB */ +#define SH7750_P4_BASE 0xff000000 /* Accessible only in + privileged mode */ +#define SH7750_A7_BASE 0x1f000000 /* Accessible only using TLB */ #define SH7750_P4_REG32(ofs) (SH7750_P4_BASE + (ofs)) #define SH7750_A7_REG32(ofs) (SH7750_A7_BASE + (ofs)) diff --git a/target-cris/cpu.h b/target-cris/cpu.h index d908775..4a9032b 100644 --- a/target-cris/cpu.h +++ b/target-cris/cpu.h @@ -101,7 +101,7 @@ typedef struct CPUCRISState { /* P0 - P15 are referred to as special registers in the docs. */ uint32_t pregs[16]; - /* Pseudo register for the PC. Not directly accessable on CRIS. */ + /* Pseudo register for the PC. Not directly accessible on CRIS. */ uint32_t pc; /* Pseudo register for the kernel stack. */ diff --git a/tests/test-mmap.c b/tests/test-mmap.c index c578e25..c67174a 100644 --- a/tests/test-mmap.c +++ b/tests/test-mmap.c @@ -322,7 +322,7 @@ void check_file_unfixed_eof_mmaps(void) fail_unless (p1[(test_fsize & pagemask) / sizeof *p1 - 1] == ((test_fsize - sizeof *p1) / sizeof *p1)); - /* Verify that the end of page is accessable and zeroed. */ + /* Verify that the end of page is accessible and zeroed. */ cp = (void *) p1; fail_unless (cp[pagesize - 4] == 0); munmap (p1, pagesize); @@ -365,7 +365,7 @@ void check_file_fixed_eof_mmaps(void) fail_unless (p1[(test_fsize & pagemask) / sizeof *p1 - 1] == ((test_fsize - sizeof *p1) / sizeof *p1)); - /* Verify that the end of page is accessable and zeroed. */ + /* Verify that the end of page is accessible and zeroed. */ cp = (void *)p1; fail_unless (cp[pagesize - 4] == 0); munmap (p1, pagesize);