From patchwork Sat Mar 5 12:51:43 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Lackorzynski X-Patchwork-Id: 85520 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 30BECB70D2 for ; Sat, 5 Mar 2011 23:52:59 +1100 (EST) Received: from localhost ([127.0.0.1]:36055 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Pvqye-0002rW-JK for incoming@patchwork.ozlabs.org; Sat, 05 Mar 2011 07:52:56 -0500 Received: from [140.186.70.92] (port=38090 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Pvqxa-0002rC-4H for qemu-devel@nongnu.org; Sat, 05 Mar 2011 07:51:51 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PvqxY-0002zO-UL for qemu-devel@nongnu.org; Sat, 05 Mar 2011 07:51:49 -0500 Received: from os.inf.tu-dresden.de ([141.76.48.99]:40836) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PvqxY-0002z8-PF for qemu-devel@nongnu.org; Sat, 05 Mar 2011 07:51:48 -0500 Received: from erwin.inf.tu-dresden.de ([141.76.48.80] helo=x) by os.inf.tu-dresden.de with esmtp (Exim 4.74) id 1PvqxW-0008Ps-Rn; Sat, 05 Mar 2011 13:51:47 +0100 From: Adam Lackorzynski To: qemu-devel@nongnu.org Date: Sat, 5 Mar 2011 13:51:43 +0100 Message-Id: <1299329505-7379-3-git-send-email-adam@os.inf.tu-dresden.de> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1299329505-7379-1-git-send-email-adam@os.inf.tu-dresden.de> References: <1299329505-7379-1-git-send-email-adam@os.inf.tu-dresden.de> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 3) X-Received-From: 141.76.48.99 Cc: Peter Maydell Subject: [Qemu-devel] [PATCH 2/4] target-arm: Don't decode old cp15 WFI instructions on v7 cores X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Peter Maydell In v7 of the ARM architecture, WFI (wait for interrupt) is a first-class instruction, but in previous versions this functionality was provided via a cp15 coprocessor register. Add correct feature checks to the decoding of the cp15 WFI instructions so that they behave correctly for newer cores. In particular, the old 0,c7,c8,2 encoding used on ARM940 has been reused for VA-to-PA translation in v6 and v7. Signed-off-by: Peter Maydell Reviewed-by: Adam Lackorzynski --- target-arm/translate.c | 35 ++++++++++++++++++++++++++++++----- 1 files changed, 30 insertions(+), 5 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index 5abf4d4..a684067 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -2538,13 +2538,38 @@ static int disas_cp15_insn(CPUState *env, DisasContext *s, uint32_t insn) if (IS_USER(s) && !cp15_user_ok(insn)) { return 1; } - if ((insn & 0x0fff0fff) == 0x0e070f90 - || (insn & 0x0fff0fff) == 0x0e070f58) { - /* Wait for interrupt. */ - gen_set_pc_im(s->pc); - s->is_jmp = DISAS_WFI; + + /* Pre-v7 versions of the architecture implemented WFI via coprocessor + * instructions rather than a separate instruction. + */ + if ((insn & 0x0fff0fff) == 0x0e070f90) { + /* 0,c7,c0,4: Standard v6 WFI (also used in some pre-v6 cores). + * In v7, this must NOP. + */ + if (!arm_feature(env, ARM_FEATURE_V7)) { + /* Wait for interrupt. */ + gen_set_pc_im(s->pc); + s->is_jmp = DISAS_WFI; + } return 0; } + + if ((insn & 0x0fff0fff) == 0x0e070f58) { + /* 0,c7,c8,2: Not all pre-v6 cores implemented this WFI, + * so this is slightly over-broad. + */ + if (!arm_feature(env, ARM_FEATURE_V6)) { + /* Wait for interrupt. */ + gen_set_pc_im(s->pc); + s->is_jmp = DISAS_WFI; + return 0; + } + /* Otherwise fall through to handle via helper function. + * In particular, on v7 and some v6 cores this is one of + * the VA-PA registers. + */ + } + rd = (insn >> 12) & 0xf; if (cp15_tls_load_store(env, s, insn, rd))