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[1/4] target-arm: Fix soft interrupt in GIC distributor

Message ID 1299329505-7379-2-git-send-email-adam@os.inf.tu-dresden.de
State New
Headers show

Commit Message

Adam Lackorzynski March 5, 2011, 12:51 p.m. UTC 
Fix selection of target list filter mode.

Signed-off-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/arm_gic.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)
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Patch

diff --git a/hw/arm_gic.c b/hw/arm_gic.c
index e6b1953..0e934ec 100644
--- a/hw/arm_gic.c
+++ b/hw/arm_gic.c
@@ -549,10 +549,10 @@  static void gic_dist_writel(void *opaque, target_phys_addr_t offset,
             mask = (value >> 16) & ALL_CPU_MASK;
             break;
         case 1:
-            mask = 1 << cpu;
+            mask = ALL_CPU_MASK ^ (1 << cpu);
             break;
         case 2:
-            mask = ALL_CPU_MASK ^ (1 << cpu);
+            mask = 1 << cpu;
             break;
         default:
             DPRINTF("Bad Soft Int target filter\n");