From patchwork Mon Feb 21 11:05:21 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 83825 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 10522B70ED for ; Mon, 21 Feb 2011 22:16:38 +1100 (EST) Received: from localhost ([127.0.0.1]:45467 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PrTkb-0004Ca-Ka for incoming@patchwork.ozlabs.org; Mon, 21 Feb 2011 06:16:21 -0500 Received: from [140.186.70.92] (port=52789 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PrTix-0003f0-0S for qemu-devel@nongnu.org; Mon, 21 Feb 2011 06:14:42 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PrTiv-0006HM-L0 for qemu-devel@nongnu.org; Mon, 21 Feb 2011 06:14:38 -0500 Received: from mnementh.archaic.org.uk ([81.2.115.146]:50643) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PrTiv-0006HB-BR for qemu-devel@nongnu.org; Mon, 21 Feb 2011 06:14:37 -0500 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1PrTZy-0004Kl-5U; Mon, 21 Feb 2011 11:05:22 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Mon, 21 Feb 2011 11:05:21 +0000 Message-Id: <1298286322-16634-2-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.3 In-Reply-To: <1298286322-16634-1-git-send-email-peter.maydell@linaro.org> References: <1298286322-16634-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) X-Received-From: 81.2.115.146 Cc: patches@linaro.org Subject: [Qemu-devel] [PATCH v3 1/2] target-arm: Refactor to pull narrowing decode into separate function X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Pull the code which decodes narrowing operations as being either signed/unsigned saturate or plain out into its own function. Signed-off-by: Peter Maydell --- target-arm/translate.c | 45 +++++++++++++++++++-------------------------- 1 files changed, 19 insertions(+), 26 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index 5f377a4..fa20e84 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -4164,6 +4164,23 @@ static inline void gen_neon_mull(TCGv_i64 dest, TCGv a, TCGv b, int size, int u) } } +static void gen_neon_narrow_op(int op, int u, int size, TCGv dest, TCGv_i64 src) +{ + if (op) { + if (u) { + gen_neon_unarrow_sats(size, dest, src); + } else { + gen_neon_narrow(size, dest, src); + } + } else { + if (u) { + gen_neon_narrow_satu(size, dest, src); + } else { + gen_neon_narrow_sats(size, dest, src); + } + } +} + /* Translate a NEON data processing instruction. Return nonzero if the instruction is invalid. We process data in a mixture of 32-bit and 64-bit chunks. @@ -4839,19 +4856,7 @@ static int disas_neon_data_insn(CPUState * env, DisasContext *s, uint32_t insn) dead_tmp(tmp3); } tmp = new_tmp(); - if (op == 8) { - if (u) { /* VQSHRUN / VQRSHRUN */ - gen_neon_unarrow_sats(size - 1, tmp, cpu_V0); - } else { /* VSHRN / VRSHRN */ - gen_neon_narrow(size - 1, tmp, cpu_V0); - } - } else { - if (u) { /* VQSHRN / VQRSHRN */ - gen_neon_narrow_satu(size - 1, tmp, cpu_V0); - } else { /* VQSHRN / VQRSHRN */ - gen_neon_narrow_sats(size - 1, tmp, cpu_V0); - } - } + gen_neon_narrow_op(op == 8, u, size - 1, tmp, cpu_V0); neon_store_reg(rd, pass, tmp); } /* for pass */ if (size == 3) { @@ -5439,19 +5444,7 @@ static int disas_neon_data_insn(CPUState * env, DisasContext *s, uint32_t insn) for (pass = 0; pass < 2; pass++) { neon_load_reg64(cpu_V0, rm + pass); tmp = new_tmp(); - if (op == 36) { - if (q) { /* VQMOVUN */ - gen_neon_unarrow_sats(size, tmp, cpu_V0); - } else { /* VMOVN */ - gen_neon_narrow(size, tmp, cpu_V0); - } - } else { /* VQMOVN */ - if (q) { - gen_neon_narrow_satu(size, tmp, cpu_V0); - } else { - gen_neon_narrow_sats(size, tmp, cpu_V0); - } - } + gen_neon_narrow_op(op == 36, q, size, tmp, cpu_V0); if (pass == 0) { tmp2 = tmp; } else {