From patchwork Mon Dec 6 17:00:09 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 74401 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id BEFEAB6EED for ; Tue, 7 Dec 2010 04:17:45 +1100 (EST) Received: from localhost ([127.0.0.1]:39377 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PPeh3-0001H9-Jo for incoming@patchwork.ozlabs.org; Mon, 06 Dec 2010 12:17:41 -0500 Received: from [140.186.70.92] (port=56975 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PPeQF-0002Oj-5P for qemu-devel@nongnu.org; Mon, 06 Dec 2010 12:00:23 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PPeQD-00063a-Fh for qemu-devel@nongnu.org; Mon, 06 Dec 2010 12:00:19 -0500 Received: from mnementh.archaic.org.uk ([81.2.115.146]:34388) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PPeQD-00061v-8B for qemu-devel@nongnu.org; Mon, 06 Dec 2010 12:00:17 -0500 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.69) (envelope-from ) id 1PPeQ7-0007mL-Uv for qemu-devel@nongnu.org; Mon, 06 Dec 2010 17:00:11 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Mon, 6 Dec 2010 17:00:09 +0000 Message-Id: <1291654811-29863-9-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1291654811-29863-1-git-send-email-peter.maydell@linaro.org> References: <1291654811-29863-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) Subject: [Qemu-devel] [PATCH 08/10] ARM: Ignore top 16 bits when doing VCVT from 16 bit fixed point X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org VCVT of 16 bit fixed point to float should ignore the top 16 bits of the source register. Cast to int16_t and friends rather than int16 -- the former is guaranteed exactly 16 bits wide where the latter is merely at least 16 bits wide (and so is usually 32 bits). Signed-off-by: Peter Maydell Reviewed-by: Nathan Froyd --- target-arm/helper.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 4bd1cd4..2925782 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -2549,7 +2549,7 @@ float32 VFP_HELPER(fcvts, d)(float64 x, CPUState *env) ftype VFP_HELPER(name##to, p)(ftype x, uint32_t shift, CPUState *env) \ { \ ftype tmp; \ - tmp = sign##int32_to_##ftype ((itype)vfp_##p##toi(x), \ + tmp = sign##int32_to_##ftype ((itype##_t)vfp_##p##toi(x), \ &env->vfp.fp_status); \ return ftype##_scalbn(tmp, -(int)shift, &env->vfp.fp_status); \ } \