| Message ID | 1256550402-94129-1-git-send-email-juha.riihimaki@nokia.com |
|---|---|
| State | New |
| Headers | show |
On Mon, Oct 26, 2009 at 10:46 AM, <juha.riihimaki@nokia.com> wrote: > From: Juha Riihimäki <juha.riihimaki@nokia.com> > > All other bits except for the EN in the VFP FPEXC register are defined > as subarchitecture specific and real functionality for any of the > other bits has not been implemented in QEMU. However, current code > allows modifying all bits in the VFP FPEXC register leading to > problems when guest code is writing 1's to the subarchitecture > specific bits and checking whether the bits stay up to verify the > existence of functionality which in fact does not exist in QEMU. > This patch has been revised to include the same behavior change in > the gdb register write function. > > Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com> Acked-by: Laurent Desnogues <laurent.desnogues@gmail.com> Laurent > --- > target-arm/helper.c | 2 +- > target-arm/translate.c | 3 +++ > 2 files changed, 4 insertions(+), 1 deletions(-) > > diff --git a/target-arm/helper.c b/target-arm/helper.c > index 701629a..ee5df59 100644 > --- a/target-arm/helper.c > +++ b/target-arm/helper.c > @@ -233,7 +233,7 @@ static int vfp_gdb_set_reg(CPUState *env, uint8_t *buf, int reg) > switch (reg - nregs) { > case 0: env->vfp.xregs[ARM_VFP_FPSID] = ldl_p(buf); return 4; > case 1: env->vfp.xregs[ARM_VFP_FPSCR] = ldl_p(buf); return 4; > - case 2: env->vfp.xregs[ARM_VFP_FPEXC] = ldl_p(buf); return 4; > + case 2: env->vfp.xregs[ARM_VFP_FPEXC] = ldl_p(buf) & (1 << 30); return 4; > } > return 0; > } > diff --git a/target-arm/translate.c b/target-arm/translate.c > index 8503b92..d19ac7f 100644 > --- a/target-arm/translate.c > +++ b/target-arm/translate.c > @@ -2804,6 +2804,9 @@ static int disas_vfp_insn(CPUState * env, DisasContext *s, uint32_t insn) > case ARM_VFP_FPEXC: > if (IS_USER(s)) > return 1; > + /* TODO: VFP subarchitecture support. > + * For now, keep the EN bit only */ > + tcg_gen_andi_i32(tmp, tmp, 1 << 30); > store_cpu_field(tmp, vfp.xregs[rn]); > gen_lookup_tb(s); > break; > -- > 1.6.5 > > > >
diff --git a/target-arm/helper.c b/target-arm/helper.c index 701629a..ee5df59 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -233,7 +233,7 @@ static int vfp_gdb_set_reg(CPUState *env, uint8_t *buf, int reg) switch (reg - nregs) { case 0: env->vfp.xregs[ARM_VFP_FPSID] = ldl_p(buf); return 4; case 1: env->vfp.xregs[ARM_VFP_FPSCR] = ldl_p(buf); return 4; - case 2: env->vfp.xregs[ARM_VFP_FPEXC] = ldl_p(buf); return 4; + case 2: env->vfp.xregs[ARM_VFP_FPEXC] = ldl_p(buf) & (1 << 30); return 4; } return 0; } diff --git a/target-arm/translate.c b/target-arm/translate.c index 8503b92..d19ac7f 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -2804,6 +2804,9 @@ static int disas_vfp_insn(CPUState * env, DisasContext *s, uint32_t insn) case ARM_VFP_FPEXC: if (IS_USER(s)) return 1; + /* TODO: VFP subarchitecture support. + * For now, keep the EN bit only */ + tcg_gen_andi_i32(tmp, tmp, 1 << 30); store_cpu_field(tmp, vfp.xregs[rn]); gen_lookup_tb(s); break;